Two-State Current Conduction in High-k/SiO_2 Stacked Dielectric with High Bandgap 4H-SiC Substrate

机译：高带隙4H-SiC衬底的高k / SiO_2叠层介质中的二态电流传导

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In the high-k/SiO_2 stacked dielectric MOS capacitor, the electrons captured by the defects associated with the oxygen vacancies in the dielectric may affect the trap assist tunneling current of the device. In this work, high bandgap material was utilized as substrate for its considerable interface states which are important to enhance the effect of trapped charges on the tunneling current. It was found that the electrons captured in high-k/SiO)_2 interface layer were crucial to block the current conduction path. Two-state current behavior was clearly observed by this mechanism.

机译：在高k / SiO_2叠层电介质MOS电容器中，与电介质中的氧空位有关的缺陷所捕获的电子可能会影响器件的陷阱辅助隧穿电流。在这项工作中，高带隙材料被用作衬底，因为它具有相当大的界面状态，这对于增强俘获电荷对隧穿电流的影响很重要。发现在高k / SiO）_2界面层中捕获的电子对于阻断电流传导路径至关重要。通过这种机制可以清楚地观察到两态电流行为。

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《Wide bandgap semiconductor materials and devices 12》|2011年|p.165-171|共7页
会议地点 Montreal(CA);Montreal(CA)
作者
Jung-Chin Chiang; Jenn-Gwo Hwu;
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Graduate Institute of Electronics Engineering / Department of Electrical Engineering, National Taiwan University, No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan;

Graduate Institute of Electronics Engineering / Department of Electrical Engineering, National Taiwan University, No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan;

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1. Leakage current and charge trapping behavior in TiO_2/SiO_2 high-κ gate dielectric stack on 4H-SiC substrate [J] . R. Mahapatra, Amit K. Chakraborty, N. Poolamai, Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures . 2007,第1期

机译：4H-SiC衬底上TiO_2 / SiO_2高k栅介质堆叠中的漏电流和电荷俘获行为
2. Characterization of thermally oxidized Ti/SiO_2 gate dielectric stacks on 4H-SiC substrate [J] . R. Mahapatra, N. Poolamai, S. Chattopadhyay, Applied Physics Letters . 2006,第7期

机译：在4H-SiC衬底上热氧化的Ti / SiO_2栅介质堆叠的特性
3. Direct tunneling gate current model for symmetric double gate junctionless transistor with SiO_2/high-k gate stacked dielectric [J] . S. Intekhab Amin, R. K. Sarin Journal of Semiconductors . 2016,第3期

机译：SiO_2 /高k栅堆叠电介质的对称双栅无结晶体管的直接隧穿栅电流模型
4. Two-State Current Conduction in High-k/SiO_2 Stacked Dielectric with High Bandgap 4H-SiC Substrate [C] . Jung-Chin Chiang, Jenn-Gwo Hwu Symposium on Wide Bandgap Semiconductor Materials and Devices . 2011

机译：具有高带隙4H-SiC基板的高K / SiO_2堆叠电介质中的两个状态电流传导
5. Voltage and temperature dependent gate capacitance and current model for high-K gate dielectric stack [D] . Fan, Yang-Yu 2002

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6. High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure [O] . Szu-Hung Chen, Wen-Shiang Liao, Hsin-Chia Yang, 2012

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7. Consideration of conduction mechanisms in high-k dielectric stacks as a tool to study electrically active defects [O] . Albena Paskaleva, Dencho Spassov, Danijel Dankovic 2017

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Two-State Current Conduction in High-k/SiO_2 Stacked Dielectric with High Bandgap 4H-SiC Substrate

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