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Compact modeling of experimental N- and P-channel finFETs.

机译：实验N和P通道finFET的紧凑模型。

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摘要

As the conventional bulk CMOS shrinks towards the deep sub-100 nm regime, the advantages of scaling are seriously limited by a series of adverse effects such as random dopant fluctuation, short-channel effects, and mobility degradation primarily due to the high substrate doping level required in ultra small devices. As a solution to extend the scaling limit further, FinFETs have become an important subject of intensive VLSI research. In this dissertation, the analytic potential model for symmetric double-gate MOSFETs is verified and calibrated with experimental n- and p-channel FinFETs over a wide range of gate lengths.Quantum mechanical effects are incorporated in the model to reproduce the measured Cg -- Vgs data of n- and p-channel FinFETs. Finite inversion layer thickness due to quantum mechanical carrier confinement at high gate overdrives becomes non-negligible for very thin oxides. The increase of effective oxide thickness degrades the gate capacitance and the drain current.The long-channel mobility is modeled by including both a phonon scattering term and a Coulomb scattering term with opposite field dependence. They are extracted from the mobility degradations in the low and high field regions respectively.The dependence of normalized drain current on gate length at low drain bias reveals that there is a slight mobility dependence on gate length due to different strain effects in n- and p-channel FinFETs respectively. In order to obtain the intrinsic mobility, Shift-and-Ratio method is applied to separate out the source-drain series resistance effects. A useful coefficient is defined and extracted to quantitatively indicate the change of mobility from its long-channel value. The coefficient indicates that the electron mobility is degraded as the gate length decreases, whereas the hole mobility is enhanced due to relaxation of the tensile strain induced by the metal gate.The short-channel model for symmetric double-gate MOSFETs based on the analytic solution to 2-D Poisson's equation is validated in terms of the measured drain-induced barrier lowering, the threshold voltage roll-off, and the subthreshold current slope of sub-100 nm FinFETs. The difference between the extracted effective channel length and the drawn gate length is nearly the same for n- and p-channel FinFETs.Other high-field effects including the channel length modulation and velocity saturation are also incorporated into the model to reproduce the drain current data at high drain bias.
机译：随着常规体CMOS朝着100 nm以下的方向发展，缩放的优势受到一系列不利影响的严重限制，例如随机掺杂物波动，短沟道效应以及主要归因于高衬底掺杂水平的迁移率降低超小型设备所需。作为进一步扩展缩放限制的解决方案，FinFET已成为VLSI深入研究的重要课题。本文通过在宽栅极长度范围内的实验性n沟道和p沟道FinFET验证并校准了对称双栅极MOSFET的分析电势模型，并将量子力学效应纳入模型中以重现测得的Cg- n通道和p通道FinFET的Vgs数据。在极高的栅极过驱动下，由于量子机械载流子的限制，有限的反型层厚度对于非常薄的氧化物变得不可忽略。有效氧化物厚度的增加会降低栅极电容和漏极电流。通过包括声子散射项和库仑散射项（具有相反的场依赖性）来建模长沟道迁移率。它们分别从低场区和高场区的迁移率退化中提取。归一化漏极电流对低漏极偏压下的栅极长度的依赖性表明，由于n和p的不同应变效应，迁移率对栅极长度的依赖性很小沟道FinFET。为了获得本征迁移率，应用了“位移与比”方法来分离出源漏串联电阻效应。定义并提取了一个有用的系数，以定量地指示其长通道值的迁移率变化。该系数表明，随着栅极长度的减小，电子迁移率下降，而由于金属栅极引起的拉伸应变的弛豫，空穴迁移率得到了增强。基于解析解的对称双栅MOSFET的短沟道模型根据测得的漏极引起的势垒降低，阈值电压下降以及亚阈值电流斜率低于100 nm FinFET，验证了二维Poisson方程的有效性。对于n沟道和p沟道FinFET，提取的有效沟道长度与绘制的栅极长度之间的差异几乎相同。其他高场效应（包括沟道长度调制和速度饱和）也被纳入模型中，以再现漏极电流高漏极偏置下的数据。

著录项

  • 作者

    Song, Jooyoung.;

  • 作者单位

    University of California, San Diego.;

  • 授予单位 University of California, San Diego.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2010
  • 页码 147 p.
  • 总页数 147
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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