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Extracting data-level parallelism from sequential programs for SIMD execution.

机译:从顺序程序中提取数据级并行性以执行SIMD。

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The goal of this research is to retarget multimedia programs written in sequential languages (e.g., C) to architectures with data-parallel execution capabilities. Image processing algorithms often have a high potential for data-level parallelism, but the artifacts imposed by the sequential programming language (e.g., loops, pointer variables) can obscure the parallelism and prohibit generation of efficient parallel code. This research presents a program representation and recognition approach for generating a data parallel program specification from sequential source code and retargeting it to data parallel execution mechanisms. The representation is based on an extension of the multi-dimensional synchronous dataflow model of computation. A partial recognition approach identifies and transforms only those program elements that hinder parallelization while leaving other computational elements intact. This permits flexibility in the types of programs that can be retargeted, while avoiding the complexity of complete program recognition.; This representation and recognition process is implemented in the PARRET system, which is used to extract the high-level specification of a set of image-processing programs. From this specification, code is generated for Intel's SSE2 instruction set and for the SIMPil processor. The results demonstrate that PARRET can exploit, given sufficient parallel resources, the maximum available parallelism in the retargeted applications. Similarly, the results show PARRET can also exploit parallelism on architectures with hardware-limited parallel resources.; It is desirable to estimate potential parallelism before undertaking the expensive process of reverse engineering and retargeting. The goal is to narrow down the search space to a select set of loops which have a high likelihood of being data-parallel. This work also presents a hybrid static/dynamic approach, called DLPEST, for estimating the data-level parallelism in sequential program loops. We demonstrate the correctness of the DLPEST's estimates, show that estimates for programs of 25 to 5000 lines of code can be performed in under 10 minutes and that estimation time scales sub-linearly with input program size.
机译:这项研究的目标是将以顺序语言(例如C)编写的多媒体程序重新定位到具有数据并行执行功能的体系结构。图像处理算法通常具有用于数据级并行性的高潜力,但是由顺序编程语言施加的伪像(例如,循环,指针变量)会掩盖并行性并禁止生成有效的并行代码。这项研究提出了一种程序表示和识别方法,用于从顺序源代码生成数据并行程序规范,并将其重新定位到数据并行执行机制。该表示基于多维同步数据流计算模型的扩展。部分识别方法仅识别和转换那些阻碍并行化而完整地保留其他计算元素的程序元素。这样就可以灵活地确定可重新定位的程序类型,同时避免了完整程序识别的复杂性。此表示和识别过程在PARRET系统中实现,该系统用于提取一组图像处理程序的高级规范。根据该规范,将为英特尔的SSE2指令集和SIMPil处理器生成代码。结果表明,在有足够的并行资源的情况下,PARRET可以在重新定向的应用程序中利用最大的并行性。类似地,结果表明PARRET也可以在硬件有限的并行资源的架构上利用并行性。在进行昂贵的逆向工程和重新定向过程之前,需要估计潜在的并行性。目的是将搜索空间缩小到一组选定的循环,这些循环很有可能是数据并行的。这项工作还提出了一种称为DLPEST的静态/动态混合方法,用于估计顺序程序循环中的数据级并行性。我们证明了DLPEST估计的正确性,表明可以在10分钟内执行25到5000行代码的程序的估计,并且估计时间与输入程序的大小成线性关系。

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