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A SILICON-BASED THERMOPILE INFRARED DETECTOR ARRAY CONTAINING ON-CHIP READOUT CIRCUITRY.

机译:基于硅的热敏红外探测器阵列,包含片上读出电路。

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摘要

This dissertation reports a new low-cost infrared detector array which has been realized using standard silicon MOS process technology and micromachining. This array is based on polysilicon-gold thermopiles supported on 1.3 (mu)m-thick dielectric diaphragm windows of SiO(,2) and Si(,3)N(,4). The boron-etch stop is used to obtain 20 (mu)m-thick silicon support rims. This technique not only eliminates sensitivity to misalignment but also allows a highly-packed diaphragm array. While the intrinsic diaphragm stress is strongly affected by the dielectric-film deposition technique and the subsequent high-temperature processes involved, flat diaphragms can be achieved reproducibly for a given process.; A single thermopile on a circular diaphragm window was fabricated using the above-mentioned structure and was also analyzed theoretically to allow better understanding of device performance. The detector responsivity decreases almost linearly as the diaphragm window diameter decreases, while the detectivity decreases in a square-root fashion. The detector time constant can be less than 10 milliseconds when the window diameter is smaller than 1.2 mm.; A typical thermopile element having 40 polysilicon-gold thermocouples supported on a 400 (mu)m x 800 (mu)m dielectric diaphragm window exhibits a responsivity of 12 V/W and a response time less than 10 msec. In the ambient temperature range from 0(DEGREES)C to 90(DEGREES)C, the responsivity decreases with a sensitivity of -1400 ppm/(DEGREES)C. The detector responds to a broad input spectral range and its dynamic range is over 10('6):1. This detector handles an input radiation power of over 5W/cm('2) without any appreciable responsivity degradation. Johnson noise is dominant in this semiconductor thermopile detector and the array packing density is limited by the required detector responsivity and detectivity. The variations in responsivity have been as high as 20% for a given process; however, use of improved deposition and doping techniques should significantly reduce these nonuniformities.; Thirty-two element thermopile arrays with on-chip E/D PMOS multiplexers have been successfully realized using an 8 mask process. It is expected that this type of array will be useful for non-contact, non-destructive product monitoring and automated process control. (Abstract shortened with permission of author.)
机译:本文报道了一种新型的低成本红外探测器阵列,该阵列已使用标准的硅MOS工艺技术和微加工技术实现了。该阵列基于支撑在SiO(,2)和Si(,3)N(,4)的1.3μm厚的介质膜窗口上的多晶硅金热电堆。硼蚀刻停止层用于获得20μm厚的硅支撑轮辋。该技术不仅消除了对未对准的敏感性,而且允许高度堆积的隔膜阵列。尽管固有​​的膜片应力受电介质膜沉积技术和后续高温工艺的强烈影响,但对于给定的工艺,可以可重复地获得平坦的膜片。使用上述结构可在圆形隔膜窗口上制造单个热电堆,并从理论上进行分析以更好地了解器件性能。随着膜片窗口直径的减小,检测器的响应率几乎呈线性下降,而检测率则以平方根的方式下降。当窗口直径小于1.2 mm时,检测器时间常数可以小于10毫秒。具有支撑在400μm×800μm的介电膜片窗口上的40个多晶硅-金热电偶的典型热电堆元件表现出12V / W的响应度和小于10msec的响应时间。在从0°C到90°C的环境温度范围内,响应度以-1400 ppm /(°C)的灵敏度降低。检测器对较宽的输入光谱范围做出响应,其动态范围超过10('6):1。该探测器可处理超过5W / cm('2)的输入辐射功率,而不会明显降低响应度。约翰逊噪声在该半导体热电堆检测器中占主导地位,并且阵列填充密度受所需的检测器响应度和检测率限制。对于给定的过程,响应度的变化高达20%。但是,使用改进的沉积和掺杂技术应该可以大大减少这些不均匀性。使用8掩膜工艺已成功实现了具有片上E / D PMOS多路复用器的32个元件热电堆阵列。预计这种类型的阵列将可用于非接触,非破坏性的产品监控和自动化过程控制。 (摘要经作者许可缩短。)

著录项

  • 作者

    CHOL, IL HYUN.;

  • 作者单位

    University of Michigan.;

  • 授予单位 University of Michigan.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 1986
  • 页码 179 p.
  • 总页数 179
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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