首页> 中文期刊> 《南京师范大学学报(工程技术版)》 >SOI嵌入式DRAM技术动态钳制电位DTMOS器件性能的优化设计

SOI嵌入式DRAM技术动态钳制电位DTMOS器件性能的优化设计

         

摘要

This paper describes the DC and high frequency characteristics of a dynamic threshold DTMOS n-channel device, fabricated within a low-cost CMOS SOC process which also includes high-density embedded DRAM. The DTMOS device design in this process was previously found to be superior to both grounded body (GB) and floating body (FB) MOSFETs. This DTMOS device achieves kink-free behavior, with gm=936μS/μm, gout=36μS/μm, Ion/Ioff=210μA/0.1pA, S=67mV/dec, and fmax=32GHz at VDD=1V. These DTMOS devices are excellent for sub-volt embedded baseband circuits with sufficient performance for RF front-end circuits, thus enabling the combination of embedded DRAM, digital, analog, and RF circuit cores in, ultra-low-power, low-cost SOCs.%描述了n-沟道动态电位DTMOS半导体器件的直流和高频特性,该器件制造采用了低功耗CMOS SOC工艺,同时也包含了高密度嵌入式DRAM技术.在本工作中的DTMOS器件在较早时候就发现性能优于本体接地(GB)和本体浮地(FB)的MOSFET器件.本器件具有无特性曲线缠绕、gm=936μS/μm, gout=36μS/μm,Ion/Ioff=210μA/0.1pA,在Vdd=1V时fmax=32GHz的良好特性,特别适用于低电压嵌入式基频电路并具有对射频RF前端电路的极佳性能,因此可以使嵌入式DRAM、数字电路、模拟电路和RF射频电路混合于一体,用在超低功耗、低成本的SOC(系统集成)芯片系统中.

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