A method of cyclical redundancy check (CRC) for mode S surface-to-air data-link is proposed and implemented in the field programmable gate array( FPGA). With a brief look at the formats of mode S uplink and down-link, the check circuit is completed on the principle of binary cyclic code, and other parts of the logic design are developed on QuartusII 8.1 platform. Expected result has been achieved by simulation experiment.%介绍了一种基于FPGA的S模式地空数据链循环冗余校验(CRC)实现方法.在掌握S模式数据链上、下行信息传输格式的基础上,根据循环码编码原理搭建校验电路,在QuartusⅡ 8.1环境下进行逻辑设计.对发送端和接收端信息进行仿真验证,达到了预期效果.
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