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Electromigration Mechanism of Failure in Flip-Chip Solder Joints Based on Discrete Void Formation

机译:基于离散空隙形成的倒装芯片焊点失效的电迁移机理

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摘要

In this investigation, SnAgCu and SN100C solders were electromigration (EM) tested, and the 3D laminography imaging technique was employed for in-situ observation of the microstructure evolution during testing. We found that discrete voids nucleate, grow and coalesce along the intermetallic compound/solder interface during EM testing. A systematic analysis yields quantitative information on the number, volume, and growth rate of voids, and the EM parameter of DZ*. We observe that fast intrinsic diffusion in SnAgCu solder causes void growth and coalescence, while in the SN100C solder this coalescence was not significant. To deduce the current density distribution, finite-element models were constructed on the basis of the laminography images. The discrete voids do not change the global current density distribution, but they induce the local current crowding around the voids: this local current crowding enhances the lateral void growth and coalescence. The correlation between the current density and the probability of void formation indicates that a threshold current density exists for the activation of void formation. There is a significant increase in the probability of void formation when the current density exceeds half of the maximum value.
机译:在这项研究中,对SnAgCu和SN100C焊料进行了电迁移(EM)测试,并使用3D层照相成像技术对测试过程中的微观结构演变进行了现场观察。我们发现,在EM测试期间,沿金属间化合物/焊料界面,离散的空隙会成核,生长并聚结。进行系统的分析可得出有关空洞的数量,体积和增长率以及DZ *的EM参数的定量信息。我们观察到SnAgCu焊料中的快速本征扩散会导致空隙增长和聚结,而在SN100C焊料中,这种聚结并不明显。为了推断当前的密度分布,在薄层图像的基础上建立了有限元模型。离散的空隙不会改变整体电流密度分布,但会引起局部电流在空隙周围拥挤:这种局部电流拥挤会增强横向空隙的生长和聚结。电流密度与空隙形成的可能性之间的相关性表明存在用于激活空隙形成的阈值电流密度。当电流密度超过最大值的一半时,空隙形成的可能性显着增加。

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