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Stress-induced leakage currents of the RF sputtered Ta_2O_2 on N-implanted silicon

机译:N注入硅上射频溅射Ta_2O_2的应力诱导泄漏电流

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摘要

The electrical (C-Vand Ⅰ-Ⅴ) and reliability (constant current stress technique) properties of RF sputtered 30 nm thick Ta_2O_5 on N-implanted Si have been investigated. The dependence on the parameters of both Ta_2O_5 and the implanted interfacial layers on the stress time are discussed. The leakage current characteristics are analyzed by previously proposed comprehensive model. It is established that the reliability of the Ta_2O_5-based capacitors can be effectively improved if the Si substrate is a subject to preliminary N-implantation—markedly smaller stress induced leakage current as compared to the films on bare Si are detected. The stress mainly affects the properties of the interfacial layer and the generation of neutral traps is identified to be the primary cause for the stress-induced degradation. It is concluded that the implantation results in a strengthening of the interfacial layer against stress degradation.
机译:研究了在N注入的Si上射频溅射30 nm厚的Ta_2O_5的电学特性(C-VandⅠ-Ⅴ)和可靠性(恒流应力技术)。讨论了Ta_2O_5和注入的界面层参数对应力时间的依赖性。通过先前提出的综合模型分析了漏电流特性。可以确定的是,如果对Si衬底进行预N注入,则可以有效地提高基于Ta_2O-5的电容器的可靠性-与裸Si上的薄膜相比,可以检测到明显较小的应力感应泄漏电流。应力主要影响界面层的性质,中性陷阱的产生被认为是应力引起的降解的主要原因。结论是,注入导致界面层的增强以抵抗应力降解。

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