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Analog Realization of Electronically Tunable Fractional-Order Differ-Integrators

机译：电子可调分数阶微分积分器的模拟实现

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This paper presents simple structures of fractional-order differentiators and fractional-order integrators. For these structures, both current mode and voltage mode designs have been implemented for differential input signals. The analog realizations of these fractional circuits use a single active element, the Differential Voltage Current Conveyor Transconductance Amplifier (DVCCTA), and a capacitive fractor. The passive elements present in the capacitive fractor are arranged in parallel RC ladder topology with their consecutive values in geometric progression. In the proposed structures, the capacitive fractor and the resistances connected at different ports of DVCCTA are all grounded, hence, making the designs simpler and less sensitive to the parasitic effects. Apart from this, the other key features of these designs are-electronically tunable, high dynamic range, robust and accurate. Simulations of all the four models are performed using TSMC technology in MentorGraphics. The non-ideal analysis of DVCCTA device and Monte Carlo analysis have been studied to validate the robustness of these models. The results obtained are in compliance with their corresponding ideal responses. Comparisons with other active element-based structures have been presented to substantiate the work proposed in this paper.
机译：本文介绍了分数阶微分器和分数阶积分器的简单结构。对于这些结构，电流模式和电压模式设计均已针对差分输入信号实现。这些分数电路的模拟实现使用单个有源元件，差分电压电流传送器跨导放大器（DVCCTA）和电容分压器。电容分式中存在的无源元件以并行RC梯形拓扑排列，其连续值呈几何级数。在所提出的结构中，电容分压器和连接在DVCCTA不同端口上的电阻都接地，因此使设计更简单并且对寄生效应不那么敏感。除此之外，这些设计的其他关键特征是电子可调，高动态范围，坚固且准确。使用MentorGraphics中的TSMC技术对所有四个模型进行仿真。已经对DVCCTA设备的非理想分析和蒙特卡洛分析进行了研究，以验证这些模型的鲁棒性。获得的结果符合其相应的理想响应。与其他基于活动元素的结构进行了比较，以证实本文提出的工作。

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