Area and power efficient frequency divider for Zigbee frequency synthesiser

RP Meenaakshi Sundhari; C Jagadeeshwaran; R Nandhakumar

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Area and power efficient frequency divider for Zigbee frequency synthesiser

机译：Zigbee频率合成器的面积和功率高效分频器

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This paper proposes an area and power efficient frequency divider used in frequency synthesisers, which operates in 2.4 GHz IEEE 802.15.4/ZigBee frequency band. The proposed frequency divider consists of a multi-modulus pre-scaler and integrated P&S counter. In order to reduce the power consumption and area, swallow counter has been replaced by a simple digital circuit. Simulation results show 30% of area and power is reduced when compared to the previous design. All of the circuits can be designed in 0.18 μm complementary metal oxide semiconductor technology with a single 1.8 V DC voltage supply.

机译：本文提出了一种用于频率合成器的区域和功率高效的分频器，该分频器工作在2.4 GHz IEEE 802.15.4 / ZigBee频带。提议的分频器由一个多模数预分频器和集成的P＆S计数器组成。为了减少功耗和面积，吞咽计数器已由简单的数字电路代替。仿真结果表明，与以前的设计相比，面积减少了30％，功耗降低了。所有电路都可以采用0.18μm互补金属氧化物半导体技术进行设计，并具有1.8 V直流单电源。

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来源
《Australian journal of electrical and electronics engineering》 |2014年第1期|7-11|共5页
作者
RP Meenaakshi Sundhari; C Jagadeeshwaran; R Nandhakumar;
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作者单位

Sasurie College of Engineering, India;

Sasurie College of Engineering, India;

Sasurie College of Engineering, India;

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原文格式 PDF
正文语种 eng
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关键词
DFF; frequency synthesiser; U-TSPC; PLL; true single-phase clock (TSPC);

机译：DFF;频率合成器U-TSPC;PLL;真正的单相时钟（TSPC）;

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专利

1. Ultra low power frequency divider for 2.45 GHz ZigBee frequency synthesizer [J] . Ali Sahafi, Jafar Sobhi, Mahdi Sahafi, Analog Integrated Circuits and Signal Processing . 2013,第1期

机译：用于2.45 GHz ZigBee频率合成器的超低功耗分频器
2. Low-power programmable divider with a shared counter for frequency synthesiser [J] . Kim K.-Y., Min Y.-J., Kim S.-W., Circuits, Devices & Systems, IET . 2011,第3期

机译：具有用于频率合成器的共享计数器的低功耗可编程分频器
3. Frequency synthesiser architecture eliminating high speed frequency dividers for millimetre-wave applications [J] . B. Catli, M. Hella Electronicsletters . 2008,第18期

机译：频率合成器架构消除了毫米波应用中的高速分频器
4. An ultra low power frequency divider for 2.4GHz ZigBee frequency synthesizer [C] . Sahafi Ali, Sobhi Jafar, Sahafi Mahdi, 7th International Conference on Electrical and Electronics Engineering . 2011

机译：用于2.4GHz ZigBee频率合成器的超低功耗分频器
5. A Low Power CMOS Phase-Locked Loop Frequency Synthesizer for High Frequency Applications with Integer-N Frequency Divider [D] . Tan, Nurettin. 2016

机译：具有整数分频器的高频应用的低功耗CMOS锁相回路频率合成器
6. Divided pulse soliton self-frequency shift: a multi-color dual-polarization power-scalable broadly tunable optical source [O] . Chenji Zhang, Victor Bucklew, Perry Edwards, -1

机译：分频脉冲孤子自移频：多色双偏振可缩放功率可广泛调谐的光源
7. A Power-Efficient 5.6-GHz Process-Compensated CMOS Frequency Divider [O] . Ivan Siu-chuang Lu, Neil Weste, Sri Parameswaran 2009

机译：高效的5.6 GHz工艺补偿CMOS分频器
8. Power Efficient 26-GHz 32:1 Static Frequency Divider in 130-nm Bulk CMOS [R] . Cao, C. , O, K. K. 2005

机译：功率高效的26-GHz 32：1静态分频器，采用130-nm Bulk CmOs封装

Area and power efficient frequency divider for Zigbee frequency synthesiser

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