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FPGA Design and Performance Evaluation of a Pulse-Based Echo Canceller for DVB-T/H

机译：DVB-T / H的基于脉冲的回声消除器的FPGA设计和性能评估

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摘要

The main design issues and performance characterization of an echo canceller for digital on-channel repeaters (OCRs) applicable to multiple standards for communications and broadcasting are addressed. In particular, in this paper we focus on a DVB-T/H scenario. The low-complexity channel cancellation technique here described is based on the introduction of a negative feedback loop capable to counterbalance the coupling effects between the OCR antennas (echoes). In the initial phase, locally generated pulse trains are transmitted to estimate the coupling channel between the transmitting and the receiving antennas. This first echo estimation is used to set-up the canceling unit, whose purpose is to generate a properly filtered replica of the repeated DVB-T/H signal compensating the echoes. After the initial set-up of the system, efficient tracking of the echoes can be performed through conventional least mean square (LMS) techniques. After developing a proper theoretical model, we introduce and discuss some important performance figures such as mean rejection ratio (MRR) and echo suppression at nominal position (ESNP). Then, a detailed description of our implementation of the echo canceller on a field programmable gate array (FPGA) board is reported. Finally, the performance of our prototype is evaluated and the measurement results are compared with those derived by the analytical model.
机译：解决了适用于多种通信和广播标准的数字同频转发器（OCR）回声消除器的主要设计问题和性能表征。特别是，在本文中，我们重点介绍DVB-T / H方案。此处描述的低复杂度信道消除技术基于负反馈环路的引入，该负反馈环路能够抵消OCR天线（回波）之间的耦合效应。在初始阶段，将发送本地生成的脉冲序列，以估计发送天线和接收天线之间的耦合信道。该第一回声估计用于建立抵消单元，其目的是生成补偿了回声的重复DVB-T / H信号的正确滤波的副本。在系统的初始设置之后，可以通过常规的最小均方（LMS）技术对回波进行有效跟踪。在建立适当的理论模型之后，我们介绍并讨论了一些重要的性能指标，例如平均抑制比（MRR）和标称位置的回声抑制（ESNP）。然后，详细报告了我们在现场可编程门阵列（FPGA）板上实现回声消除器的过程。最后，我们评估了原型的性能，并将测量结果与分析模型得出的结果进行了比较。

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