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Techniques of impedance matching for minimal PCB channel loss at 40 GBPS signal transmission

机译：阻抗匹配技术，可在40 GBPS信号传输时将PCB通道损耗降至最低

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摘要

Purpose This paper aims to analyze the negative impact of surface mount (SMT) pad and imperfect via structure such as stub, pad, non-functional pad (NFP) and anti-pad on the signal integrity at 40 Gbps transmission on printed circuit board (PCB) due to impedance mismatch or discontinuity. The optimized modeling of via and SMT structures is performed to achieve minimal impedance mismatch and insertion loss less than 10 dB for six-inch full path transmission line between transmitter and receiver on PCB at Nyquist frequency 20 GHz. Design/methodology/approach This work is split into two phases. The first phase involves optimization of via and SMT structures in three-dimensional electromagnetic (3DEM) simulation using Hyperlynx Via Wizard and Keysight EMPro software, respectively, followed by analysis of time domain reflectometry (TDR) and insertion loss (Sdd21). Whereas, in the second phase, full path hybrid mode simulation involving vias for signal layer transition, a 6-inch PCB channel and SMT pads is performed using Keysight ADS software to observe the TDR, Sdd21 and eye diagram at 40 Gbps transmission. Findings Imperfect via and SMT structures have a negative effect on signal reflection and attenuation. The optimized via and SMT minimizes the impedance mismatch by 81 per cent and insertion loss by 4.5 dB, ultimately enlarging the eye diagram opening to achieve minimal data loss at receiver with 40 Gbps transmission. Originality/value The results of original empirical research work on signal integrity analysis that optimizes the PCB channel design to achieve 40 Gbps signal transmission are presented in this study. It serves as a reference guide for high-speed PCB layout design.
机译：目的本文旨在分析表面贴装（SMT）焊盘以及不完整的通孔结构（例如，存根，焊盘，非功能焊盘（NFP）和抗焊盘）对印刷电路板上40 Gbps传输时信号完整性的负面影响（ PCB）由于阻抗不匹配或不连续。对过孔和SMT结构进行了优化建模，以实现20奈奎斯特频率下PCB上发射器和接收器之间六英寸全径传输线的最小阻抗失配和插入损耗小于10 dB。设计/方法/方法这项工作分为两个阶段。第一阶段涉及分别使用Hyperlynx Via Wizard和Keysight EMPro软件在三维电磁（3DEM）模拟中优化过孔和SMT结构，然后分析时域反射仪（TDR）和插入损耗（Sdd21）。而在第二阶段，使用Keysight ADS软件执行全路径混合模式仿真，涉及用于信号层转换的通孔，6英寸PCB通道和SMT焊盘，以40 Gbps的传输速率观察TDR，Sdd21和眼图。结果不完善的通孔和SMT结构会对信号反射和衰减产生负面影响。经过优化的过孔和SMT将阻抗不匹配最小化了81％，插入损耗最小化了4.5 dB，最终扩大了眼图的开度，从而在40 Gbps传输的接收器上实现了最小的数据丢失。独创性/价值本研究提出了信号完整性分析的原始经验研究结果，该研究结果优化了PCB通道设计以实现40 Gbps信号传输。它可作为高速PCB布局设计的参考指南。

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