Memristor-Based Low-Power High-Speed Nonvolatile Hybrid Memory Array Design

Asif Faruque Khandoker; Biswas Baishakhi Rani; Rashid A. B. M. Harun-ur

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Memristor-Based Low-Power High-Speed Nonvolatile Hybrid Memory Array Design

机译：基于忆阻器的低功耗高速非易失性混合存储阵列设计

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In this paper, a memristor-transistor hybrid architecture-based nonvolatile memory array design approach has been proposed. Here, a single memory cell consists of a memristor and one transmission gate, whereas a conventional SRAM cell consists of six transistors. This proposed design has the advantage of being nonvolatile, having high switching speed and low power requirement. The proposed cell shows better performance in comparison with other published memristor-transistor hybrid memory cell.

机译：本文提出了一种基于忆阻器-晶体管混合架构的非易失性存储器阵列设计方法。这里，一个存储单元由一个忆阻器和一个传输门组成，而传统的SRAM单元由六个晶体管组成。该提出的设计具有非易失性，具有高开关速度和低功率要求的优点。与其他公开的忆阻器-晶体管混合存储单元相比，拟议的单元显示出更好的性能。

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来源
《Circuits, systems, and signal processing》 |2017年第9期|3585-3597|共13页
作者
Asif Faruque Khandoker; Biswas Baishakhi Rani; Rashid A. B. M. Harun-ur;
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作者单位

Bangladesh Univ Engn & Technol, Dhaka, Bangladesh;

Bangladesh Univ Engn & Technol, Dhaka, Bangladesh;

Bangladesh Univ Engn & Technol, Dhaka, Bangladesh;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
中图分类
关键词
Memristor; Transmission gate; Nonvolatile; High speed; Low power;

机译：忆阻器;传输门;非易失性;高速;低功耗;

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1. Nonvolatile Nanoelectromechanical Memory Switches for Low-Power and High-Speed Field-Programmable Gate Arrays [J] . Kim Y.J., Choi W.Y. Electron Devices, IEEE Transactions on . 2015,第2期

机译：用于低功率和高速现场可编程门阵列的非易失性纳米机电存储开关
2. An Ultrafast Nonvolatile Memory with Low Operation Voltage for High-Speed and Low-Power Applications [J] . Zhang Zhi-Cheng, Li Yuan, Li Jiaqiang, Advanced Functional Materials . 2021,第28期

机译：超快非易失性存储器，具有低运行电压的高速和低功耗应用
3. Nonvolatile Programmable Switch With Adjacently Integrated Flash Memory and CMOS Logic for Low-Power and High-Speed FPGA [J] . Zaitsu Koichiro, Tatsumura Kosuke, Matsumoto Mari, Electron Devices, IEEE Transactions on . 2015,第12期

机译：非易失性可编程开关，具有集成的闪存和CMOS逻辑，适用于低功耗和高速FPGA
4. An MTJ-based nonvolatile associative memory architecture with intelligent power-saving scheme for high-speed low-power recognition applications [C] . Ma Yitao, Shibata Tadashi, Endoh Tetsuo IEEE International Symposium on Circuits and Systems . 2013

机译：基于MTJ的非易失性关联存储器架构，具有智能节电方案，适用于高速低功耗识别应用
5. Reconfiguration Optimization for Nonvolatile Memories Based Field Programmable Gate Arrays [D] . Xue, Yuan. 2018

机译：基于非易失性存储器字段可编程门阵列的重新配置优化
6. CMOS-compatible ferroelectric NAND flash memory for high-density low-power and high-speed three-dimensional memory [O] . Min-Kyu Kim, Ik-Jyae Kim, Jang-Sik Lee 2021

机译：CMOS兼容的铁电NAND闪存用于高密度低功耗和高速三维内存
7. Design and analysis of a high-speed sense amplifier forsingle-transistor nonvolatile memory cells [O] . Amin A.A.M. 1993

机译：设计和分析高速读出放大器的单晶体管非易失性存储单元
8. Integrated, nonvolatile, high-speed analog random access memory [R] . 1994

机译：集成的非易失性高速模拟随机存取存储器

Memristor-Based Low-Power High-Speed Nonvolatile Hybrid Memory Array Design

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