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首页> 外文期刊>Circuits, systems, and signal processing >An Efficient Look-up Table-based Approach for Multiplication over GF(2~m) Generated by Trinomials
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An Efficient Look-up Table-based Approach for Multiplication over GF(2~m) Generated by Trinomials

机译：基于有效查找表的三项式生成的GF（2〜m）乘法的方法

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In this paper, we present an efficient look-up table (LUT)-based approach to design multipliers for GF(2~m) generated by irreducible trinomials. A straightforward LUT-based multiplication requires a table of size (m × 2~m) bits for the Galois field of degree m. The LUT size, therefore, becomes quite large for the fields of large degrees recommended by the National Institute of Standards and Technology (NIST). Keeping that in view, we have proposed a digit-serial LUT-based design, where operand bits are grouped into digits of fixed width, and multiplication is performed in serial/parallel manner. We restrict the digit size to 4 to store only 16 words in the LUT to have lower area-delay complexity. We have also proposed a digit-parallel LUT-based design for high-speed applications, using the same LUT as the digit-serial design, at the cost of some additional multiplexors and combinational logic for parallel modular reductions and additions. We have presented a simple circuit for the initialization of LUT content, which can be used to update the LUT in three cycles whenever required. The proposed digit-serial design involves less area-complexity and less time-complexity than those of the existing LUT-based designs. The proposed digit-parallel design offers nearly 28 % improvement in area-delay product over the best of the existing LUT-based designs. NIST has recommended five binary finite fields for elliptic curve cryptography, out of which two are generated by the trinomials Q(x) = x~(233) + x~(74) + 1 and Q(x) = x~(409) + x~(87) + 1. In this paper, we have designed a reconfigurable multiplier that can be used for both these fields. The proposed reconfigurable multiplier is shown to have a negligible reconfiguration overhead and would be useful for cryptographic applications.
机译：在本文中，我们提出了一种基于有效查找表（LUT）的方法来设计不可约多项式生成的GF（2〜m）的乘法器。一个简单的基于LUT的乘法需要一个度数为m的Galois字段的大小（m×2〜m）位表。因此，对于美国国家标准技术研究院（NIST）推荐的大范围领域，LUT尺寸变得相当大。考虑到这一点，我们提出了一种基于数字串行LUT的设计，其中操作数位被分组为固定宽度的数字，并且以串行/并行方式执行乘法。我们将位数限制为4，以在LUT中仅存储16个字，以降低区域延迟的复杂度。我们还为高速应用提出了一种基于数字并行LUT的设计，该设计使用与数字串行设计相同的LUT，但要付出一些额外的多路复用器和组合逻辑的代价，以减少并行模块的数量和增加成本。我们提供了一个用于初始化LUT内容的简单电路，该电路可在需要时在三个周期内用于更新LUT。所提出的数字串行设计比现有的基于LUT的设计具有更少的区域复杂性和更少的时间复杂性。与现有基于LUT的最佳设计相比，拟议的数字并行设计可将面积延迟产品提高近28％。 NIST为椭圆曲线密码建议了五个二进制有限域，其中两个是由三项式Q（x）= x〜（233）+ x〜（74）+1和Q（x）= x〜（409）生成的+ x〜（87）+ 1.在本文中，我们设计了一个可重新配置的乘法器，可用于这两个字段。所提出的可重配置乘法器的重配置开销可忽略不计，对密码应用很有用。

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