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A Comparison Study of Diode-String ESD Clamps for CMOS Input Protection

机译：用于CMOS输入保护的二极管串ESD钳位的比较研究

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摘要

Based on 2-D device simulations and mixed-mode transient simulations, DC and transient discharge characteristics of a usual diode string utilizing a standard CMOS process, and a diode string utilizing a triple-well CMOS process, which can serve as an essential V_(DD)-V_(SS) clamp device for CMOS input ESD protection were compared. Transient discharge characteristics including peak voltages developed across gates oxides of transistors in input buffers, lattice heating inside ESD protection devices, and ratios of discharge current components at its peak inside the diode-string clamp were compared. DC standby current levels added per each input pad structure, which are the critical parameters determining usefulness of the devices, were also compared. We showed that the diode-string devices in comparison can serve successfully as a V_(DD)-V_(SS) clamp device for ESD protection by virtue of the dominant pnpn thyristor-related conduction mechanisms. Optimization of design parameters including anode-cathode contact spacing in each diode in the string, device width of the diode string, and number of diodes in the diode string was performed to present transient discharge and DC characteristics of some recommendable design examples, which can serve as a guideline in designing diode-string clamp devices.
机译：基于2-D器件仿真和混合模式瞬态仿真，使用标准CMOS工艺的普通二极管串以及使用三阱CMOS工艺的二极管串的DC和瞬态放电特性可以用作基本的V_（比较了用于CMOS输入ESD保护的DD）-V_（SS）钳位器件。比较了瞬态放电特性，包括输入缓冲器中晶体管的栅极氧化物两端产生的峰值电压，ESD保护器件内部的晶格加热以及二极管串钳位的峰值处的放电电流分量的比率。还比较了每个输入焊盘结构增加的直流待机电流水平，这是确定设备有用性的关键参数。我们证明，相比之下，二极管串器件可以凭借主要的pnpn晶闸管相关的传导机制成功地用作用于ESD保护的V_（DD）-V_（SS）钳位器件。对设计参数进行了优化，包括串中每个二极管的阳极-阴极接触间距，二极管串的器件宽度以及二极管串中的二极管数量，以呈现一些推荐设计示例的瞬态放电和直流特性，这些特性可用于作为设计二极管串钳位器件的准则。

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