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首页> 外文期刊>Components, Packaging and Manufacturing Technology, IEEE Transactions on >Study of Annular Copper-Filled TSVs of Sensor and Interposer Chips for 3-D Integration
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Study of Annular Copper-Filled TSVs of Sensor and Interposer Chips for 3-D Integration

机译：三维集成的环形铜填充TSV的研究

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摘要

Actually, the 3-D integrating process is often viewed as the integration of wafer thinning, through-silicon vias (TSVs) etching and filling, redistribution layer formulation, and microbump bonding. The TSV formulation is a critical process because TSV decides the quality of the interconnection. In this paper, the annular copper-filled TSVs are fabricated into the sensor and interposer chips, which are thinned to 100 mu m, and 10-mu m-diameter TSV is etched and annularly filled by 2-mu m-thick copper only utilizing sputtering. It can significantly simplify the chip fabricating process, which only includes the TSV etching (deep reactive-ion etching), insulating layer formation, barrier layer sputtering and copper layer sputtering, and peeling. The thermal reliability of the annularly filled TSV structure is studied by the finite-element simulation, and it is found that the thermal stress is markedly reduced, and in the thermal cycle test, annularly filled TSV samples show better reliability. Meanwhile, the measured electrical conductivity shows a slightly worse but enough electrical conductivity property.
机译：实际上，3-D积分过程通常被视为晶片变薄，直通硅通孔（TSV）蚀刻和填充，再分配层配方和MicroBump键合的整合。 TSV制剂是关键过程，因为TSV决定互连的质量。在本文中，将环形填充的TSV制成传感器和插入芯片，其薄荷薄达至100μm，并且蚀刻10-mu m直径Tsv，并仅利用2-mu m厚的铜环形填充溅射。它可以显着简化芯片制造过程，其仅包括TSV蚀刻（深反应离子蚀刻），绝缘层形成，阻挡层溅射和铜层溅射和剥离。通过有限元模拟研究了环形填充的TSV结构的热可靠性，并且发现热应力显着降低，并且在热循环测试中，环形填充的TSV样品显示出更好的可靠性。同时，测量的电导率显示出稍微差但足够的电导率。

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