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Low-Overhead Fault-Tolerance Technique for a Dynamically Reconfigurable Softcore Processor

机译：动态可重新配置软核处理器的低开销容错技术

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摘要

In this paper, we propose a new approach to implement a reliable softcore processor on SRAM-based FPGAs, which can mitigate radiation-induced temporary faults (single-event upsets (SEUs)) at moderate cost. A new Enhanced Lockstep scheme built using a pair of MicroBlaze cores is proposed and implemented on Xilinx Virtex-5 FPGA. Unlike the basic lockstep scheme, ours allows to detect and eliminate its internal temporary configuration upsets without interrupting normal functioning. Faults are detected and eliminated using a Configuration Engine built on the basis of the PicoBlaze core which, to avoid a single point of failure, is implemented as fault-tolerant using triple modular redundancy (TMR). A softcore processor can recover from configuration upsets through partial reconfiguration combined with roll-forward recovery. SEUs affecting logic which are significantly less likely than those affecting configuration are handled by checkpointing and rollback. Finally, to handle permanent faults, the tiling technique is also proposed. The new Enhanced Lockstep scheme requires significantly shorter error recovery time compared to conventional lockstep scheme and uses significantly smaller number of slices compared to known TMR-based design (although at the cost of longer error recovery time). The efficiency of the proposed approach was validated through fault injection experiments.
机译：在本文中，我们提出了一种在基于SRAM的FPGA上实现可靠的软核处理器的新方法，该方法可以以中等成本缓解辐射引起的临时故障（单事件翻转（SEU））。提出并使用Xilinx Virtex-5 FPGA在一对MicroBlaze内核上构建了新的增强型锁步方案。与基本的锁步方案不同，我们的方法可以检测并消除其内部临时配置问题，而不会中断正常功能。使用基于PicoBlaze内核构建的配置引擎来检测并消除故障，为了避免单点故障，该引擎使用三重模块冗余（TMR）实现为容错。软核处理器可以通过部分重新配置与前滚恢复相结合，从配置混乱中恢复。通过检查点和回滚来处理影响逻辑的SEU，其可能性远小于影响配置的SEU。最后，为处理永久性故障，还提出了平铺技术。与传统的锁步方案相比，新的增强型锁步方案所需的错误恢复时间要短得多，并且与已知的基于TMR的设计相比，使用的条带数量要少得多（尽管以更长的错误恢复时间为代价）。通过故障注入实验验证了该方法的有效性。

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