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首页> 外文期刊>Advances in Science, Technology and Engineering Systems >Signal-to-Quantization Noise Ratio of the Parallel Digital Ramp Analog-to-Digital Converter
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Signal-to-Quantization Noise Ratio of the Parallel Digital Ramp Analog-to-Digital Converter

机译：并行数字斜坡模数转换器的信噪比

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This work presents a theoretical analysis of the Signal-to-Quantization Noise Ratio (SQNR) of the nonuniform Parallel Digital Ramp Pulse Position Modulator Analog-to-Digital Converter (PDR-ADC) architecture. The PDR-ADC partitions the amplitude axis into P non-overlapping partitions that sample the analog input at input signal driven instances. Samples are generated when the input signal crosses a digital ramp in a partition. The parallel digital ramps operate from a single clock. For sinusoidal signals, it is shown, for uniform partitions the SQNR can be increased be increasing the number of bits in the counter or by increasing the number of partitions. A geometric partitioning scheme is then proposed where, again for sinusoids, it is shown that this quantization rule has the e_ect of attempting to maintain the SQNR approximately constant. For geometric partitioning, it is shown that the largest SQNR is achieved when the geometric parameter, common ratio, equals two.
机译：这项工作提出了非均匀并行数字斜坡脉冲位置调制器模数转换器（PDR-ADC）架构的信号量化噪声比（SQNR）的理论分析。 PDR-ADC将幅度轴划分为P个不重叠的分区，这些分区在输入信号驱动实例处对模拟输入进行采样。当输入信号越过分区中的数字斜坡时，将生成样本。并行数字斜坡从单个时钟开始工作。对于正弦信号，如图所示，对于均匀分区，可以通过增加计数器中的位数或通过增加分区数来增加SQNR。然后提出了一种几何划分方案，其中，对于正弦曲线，再次表明，该量化规则具有试图保持SQNR近似恒定的效果。对于几何分区，显示出当几何参数（公共比率）等于2时，可以获得最大的SQNR。

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