Implementation of a RANLUX Based Pseudo-Random Number Generator in FPGA Using VHDL and Impulse C

D?browska-Boruch; Agnieszka; Gancarczyk; Grzegorz; Wiatr; Kazimierz

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Implementation of a RANLUX Based Pseudo-Random Number Generator in FPGA Using VHDL and Impulse C

机译：使用VHDL和脉冲C在FPGA中实现基于RANLUX的伪随机数生成器

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Monte Carlo simulations are widely used e.g. in the field of physics and molecular modelling. The main role played in these is by the high performance random number generators, such as RANLUX or MERSSENE TWISTER. In this paper the authors introduce the world's first implementation of the RANLUX algorithm on an FPGA platform for high performance computing purposes. A significant speed-up of one generator instance over 60 times, compared with a graphic card based solution, can be noticed. Comparisons with concurrent solutions were made and are also presented. The proposed solution has an extremely low power demand, consuming less than 2.5 Watts per RANLUX core, which makes it perfect for use in environment friendly and energy-efficient supercomputing solutions and embedded systems.

机译：蒙特卡罗模拟被广泛使用，例如在物理和分子建模领域。其中的主要作用是高性能随机数生成器，例如RANLUX或MERSSENE TWISTER。本文作者介绍了RANLUX算法在FPGA平台上的全球首个实现，以实现高性能计算。与基于图形卡的解决方案相比，可以注意到一个生成器实例的速度大大提高了60倍。与并发解决方案进行了比较，并提出了。所提出的解决方案具有极低的功率需求，每个RANLUX内核的功耗不到2.5瓦，这使其非常适合在环境友好，高能效的超级计算解决方案和嵌入式系统中使用。

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《Computing and informatics》 |2014年第6期|共21页
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D?browska-Boruch; Agnieszka; Gancarczyk; Grzegorz; Wiatr; Kazimierz;
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中图分类计算技术、计算机技术;
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1. IMPLEMENTATION OF A RANLUX BASED PSEUDO-RANDOM NUMBER GENERATOR IN FPGA USING VHDL AND IMPULSE C [J] . Agnieszka Dabrowska-Boruch, Grzegorz Gancarczyk, Kazimierz Wiatr Computing and informatics . 2013,第6期

机译：基于VHDL和脉冲C的FPGA中基于RANLUX的伪随机数生成器的实现
2. FPGA implementation of SRAM PUFs based cryptographically secure pseudo-random number generator [J] . Chen Shuai, Li Bing, Zhou Cenjun Microprocessors and microsystems . 2018,第JUNa期

机译：基于SRAM PUF的加密安全伪随机数生成器的FPGA实现
3. FPGA implementation of UWB-IR impulse generator and its corresponding decoder based on discrete wavelet packet [J] . Kizil C. H., Diou C., Rabiai M., AEU: Archiv fur Elektronik und Ubertragungstechnik: Electronic and Communication . 2020,第期

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5. Design and implementation of a programmable digital pseudo-random bit generator for applications in noise radar. [D] . Aytimur, Cenk. 2013

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6. VHDL Descriptions for the FPGA Implementation of PWL-Function-Based Multi-Scroll Chaotic Oscillators [O] . Esteban Tlelo-Cuautle, Antonio de Jesus Quintas-Valles, Luis Gerardo de la Fraga, 2011

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Implementation of a RANLUX Based Pseudo-Random Number Generator in FPGA Using VHDL and Impulse C

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