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首页> 外文期刊>Journal of Computers >Mapping Floating-Point Kernels onto High Performance Reconfigurable Computers
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Mapping Floating-Point Kernels onto High Performance Reconfigurable Computers

机译：将浮点内核映射到高性能可重新配置计算机上

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—Contemporary field programmable gate arrays (FPGAs) combine the fine-grained design capability of the traditional lookup table with the speed of medium-scale and large-scale logic components such as RAM blocks or DSP blocks to provide for significant computational capability from a single FPGA. High performance reconfigurable computers, which typically use FPGAs as computational elements, have been commercially used to accelerate computational kernels. However, the deep pipelines and extensive parallelism needed for FPGAs to compete with GHz-scale general purpose processors make mapping of floating-point kernels a challenging research area. In this paper, we describe some of the progress that has been made towards solving some of these mapping challenges.
机译：- Contemporary Dields可编程门阵列（FPGA）将传统查找表的细粒度设计能力与中型和大型逻辑组件（如RAM块或DSP块）的速度相结合，以提供从单个的显着计算能力FPGA。通常使用FPGA作为计算元素的高性能可重新配置计算机已商业用来加速计算内核。然而，FPGA需要与GHz级通用处理器竞争所需的深层管道和广泛的并行性，使浮点内核的映射成为一个具有挑战性的研究区域。在本文中，我们描述了解决一些旨在解决这些绘图挑战的一些进展。

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