Leakage Controlled Read Stable Static Random Access Memories

Sayeed A. Badrudduza; Ziyan Wang; Giby Samson; Lawrence T. Clark

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Leakage Controlled Read Stable Static Random Access Memories

机译：泄漏控制读取稳定的静态随机存取存储器

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—Semiconductor manufacturing process scalingincreases leakage and transistor variations, both of whichare problematic for static random access memory (SRAM).Since SRAM is a critical component in modern CMOSintegrated circuits, novel approaches to addressing theseproblems are needed. Here, six and seven transistor SRAMcells are presented that do not suffer from reduced stabilitywhen read. The cells reside in a low leakage, voltagecollapsed, low standby power mode when not beingaccessed. Both six transistor and seven transistor variationsof the basic approach are explored through simulation andmeasured results. The circuit topology, layout, and impacton memory design of the proposed cell designs aredescribed. Measured results on a 130 nm foundryfabrication process demonstrate the viability of three of thepossible cell configurations. Circuit simulation is used toexplore the cell stability in the presence of processvariations, and to show the value of the proposed SRAM celldesigns on future scaled manufacturing technologies.

机译：- 界面制造工艺ScalingIncrase释放泄漏和晶体管变化，静态随机存取存储器（SRAM）中的任何问题都是问题。SRAM是现代CMOSINCETED电路中的关键组成，需要寻址这些问题的新方法。这里，提出了六个晶体管SRamcells，其不会遭受读取的稳定性降低。当不矛盾时，细胞驻留在低泄漏，电压且低待机电源模式下。通过模拟和训练结果探索了六个晶体管和七个晶体管变化的基本方法。所提出的细胞设计的电路拓扑，布局和抗冲击器设计。在130nm铸造效果过程上测量结果证明了三种可接受的细胞配置的可行性。电路模拟用于在存在过程中的存在下探索细胞稳定性，并显示未来扩展制造技术的所提出的SRAM CellDesigns的价值。

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《Journal of Computers》 |2008年第4期|共11页
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Sayeed A. Badrudduza; Ziyan Wang; Giby Samson; Lawrence T. Clark;
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1. 39% access time improvement, 11% energy reduction, 32 kbit 1-read/1-write 2-port static random-access memory using two-stage read boost and write-boost after read sensing scheme [J] . Yamamoto Yasue, Moriwaki Shinichi, Kawasumi Atsushi, Japanese journal of applied physics . 2016,第4s期

机译：存取时间缩短39％，能耗降低11％，32 kbit 1读/ 1写2端口静态随机存取存储器，采用两级读增强和读感应方案后的写升压
2. Analyzing the Impact of Nano-Scale Body Biasing Technique on Leakage and Delay of Highly Stable 16-Bit Static Random Access Memory Array [J] . Shyam Akashe, Rachana Ekbote, Sanjay Sharma Journal of computational and theoretical nanoscience . 2013,第10期

机译：分析纳米尺度人体偏置技术对高度稳定的16位静态随机存取存储器阵列的泄漏和延迟的影响
3. Single bit line accessed high-performance ultra-low voltage operating 7T static random access memory cell with improved read stability [J] . Rawat Bhawna, Mittal Poornima International journal of circuit theory and applications . 2021,第5期

机译：单位线访问高性能超低电压操作7T静态随机存取存储器，具有改善的读取稳定性
4. LCSRAM: A Leakage Controlled Six-transistor Static Random Access Memory Cell with Intrinsically High Read Stability [C] . Sayeed A. Badrudduza, Giby Samson, Lawrence T. Clark International Conference on VLSI Design . 2007

机译：LCSRAM：泄漏控制的六晶体管静态随机存取存储器，具有本质上的读取稳定性
5. Static Random-Access Memory Designs Based on Different Finfets at Lower Technology Node (7NM) [D] . Nizam, Athiya . 2019

机译：基于较低技术节点（7nm）的不同FINFET的静态随机存取存储器设计
6. Analysis of Leakage Current of HfO2/TaOx-Based 3-D Vertical Resistive Random Access Memory Array [O] . Zhisheng Chen, Renjun Song, Qiang Huo, 2021

机译：基于HFO2 / TAOX的3-D垂直电阻随机存取存储器阵列漏电流分析
7. Leakage Controlled Read Stable Static Random Access Memories [O] . Sayeed A. Badrudduza, Ziyan Wang, Giby Samson, 2015

机译：漏电控制读稳定静态随机存取存储器
8. SEU (Single Event Upset) Tolerant Memory Cell Derived from Fundamental Studies of SEU Mechanisms in SRAM (Static Random Access Memories) [R] . Weaver, H. T. , Axness, C. L. , McBrayer, J. D. , 1987

机译：sEU（单事件翻转）容忍存储器单元源自sRam中的sEU机制的基础研究（静态随机存取存储器）

Leakage Controlled Read Stable Static Random Access Memories

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