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首页> 外文期刊>Circuits and Systems I: Regular Papers, IEEE Transactions on >State-of-the-Art and Future Directions of High-Performance All-Digital Frequency Synthesis in Nanometer CMOS
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State-of-the-Art and Future Directions of High-Performance All-Digital Frequency Synthesis in Nanometer CMOS

机译：纳米CMOS高性能全数字频率合成技术的最新发展和未来方向

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摘要

The past several years have successfully brought all-digital techniques to the RF frequency synthesis, which could arguably be considered one of the last strong bastions of the traditionally-analog design approaches. With their high sensitivity and high dynamic range requirements, the RF circuits have long had a good excuse to avoid any possible source of digital switching activity. With the constant scaling of CMOS feature size and the merciless push for integration, the existence of almost free and powerful digital logic could not go unnoticed. Hence, the environment was ripe to transform the RF functions into digital realizations, as well as to apply digital assistance to help with the performance of RF circuits. This paper revisits the digitization journey of the traditional charge-pump PLL that has resulted in an all-digital frequency synthesizer with the best-in-class RF performance while occupying only a fraction of the silicon area and consuming a fraction of the power. The paper also offers a few novel techniques to further improve area, current consumption, testability, and reliability of frequency synthesizers.
机译：在过去的几年中，已经成功地将全数字技术引入了RF频率合成，可以将其视为传统模拟设计方法的最后坚固堡垒之一。由于具有高灵敏度和高动态范围要求，RF电路长期以来一直是避免任何可能的数字开关活动来源的良好借口。随着CMOS功能尺寸的不断缩小以及对集成的无情推动，几乎不存在任何功能强大的自由数字逻辑。因此，环境已经成熟，可以将RF功能转换为数字实现，并应用数字辅助来帮助改善RF电路的性能。本文回顾了传统电荷泵PLL的数字化历程，它使全数字频率合成器具有同类最佳的RF性能，同时仅占硅片面积的一小部分，并消耗了一部分功率。本文还提供了一些新颖的技术来进一步改善频率合成器的面积，电流消耗，可测试性和可靠性。

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