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首页> 外文期刊>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems >Layout Decomposition Co-Optimization for Hybrid E-Beam and Multiple Patterning Lithography
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Layout Decomposition Co-Optimization for Hybrid E-Beam and Multiple Patterning Lithography

机译：混合电子束和多图案光刻技术的布局分解协同优化

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摘要

As the feature size keeps scaling down and the circuit complexity increases rapidly, a more advanced hybrid lithography, which combines multiple patterning and electron-beam lithography (EBL), is promising to further enhance the pattern resolution. In this paper, we formulate the layout decomposition problem for this hybrid lithography as a minimum vertex deletion K -partition problem, where K is the number of masks in multiple patterning. Stitch minimization and EBL throughput are considered uniformly by adding a virtual vertex between two feature vertices for each stitch candidate during the conflict graph construction phase. For K=2 , we propose a primal-dual (PD) method for solving the underlying minimum odd-cycle cover problem efficiently. In addition, a chain decomposition algorithm is employed for removing all “noncyclable” edges. Furthermore, we investigate two versions of the PD method, one with planarization and one without. For K>2 , we propose a random-initialized local search method that iteratively applies the PD solver. Experimental results show that compared with a two-stage method, our proposed methods reduce the EBL usage by 65.5% with double patterning and 38.7% with triple patterning on average for the benchmarks.
机译：随着特征尺寸的不断缩小和电路复杂性的迅速提高，结合了多个图案化和电子束光刻（EBL）的更先进的混合光刻技术有望进一步提高图案分辨率。在本文中，我们将这种混合光刻的布局分解问题表述为最小顶点删除K分区问题，其中K是多次构图中的掩模数量。通过在冲突图构建阶段为每个针迹候选在两个特征顶点之间添加虚拟顶点，可以统一考虑针迹最小化和EBL吞吐量。对于K = 2，我们提出了一种原始对偶（PD）方法来有效地解决潜在的最小奇数循环覆盖问题。另外，采用链分解算法来去除所有“不可循环的”边缘。此外，我们研究了PD方法的两种版本，一种是平面化的，另一种是不平坦的。对于K> 2，我们提出了一种随机初始化的局部搜索方法，该方法迭代地应用了PD求解器。实验结果表明，与两阶段方法相比，对于基准，我们提出的方法平均将EBL的使用量降低了65.5％（采用双模式）和38.7％（采用三模式）。

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  • 作者

    Yunfeng Yang; Wai-Shing Luk; David Z. Pan; Hai Zhou; Changhao Yan; Dian Zhou; Xuan Zeng;

  • 作者单位

    Department of Microelectronics, State Key Laboratory of Application Specific Integrated Circuits, Fudan University, Shanghai, China;

    Department of Microelectronics, State Key Laboratory of Application Specific Integrated Circuits, Fudan University, Shanghai, China;

    Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA;

    Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, IL, USA;

    Department of Microelectronics, State Key Laboratory of Application Specific Integrated Circuits, Fudan University, Shanghai, China;

    Department of Microelectronics, State Key Laboratory of Application Specific Integrated Circuits, Fudan University, Shanghai, China;

    Department of Microelectronics, State Key Laboratory of Application Specific Integrated Circuits, Fudan University, Shanghai, China;

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  • 正文语种 eng
  • 中图分类
  • 关键词

    Lithography; Layout; Throughput; Planarization; Ultraviolet sources; Search methods; Writing;

    机译：平版印刷术;版图;通量;平面化;紫外线源;搜索方法;笔迹;

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