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Information Density in Multi-Layer Resistive Memories

机译:多层电阻存储器中的信息密度

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摘要

Resistive memories store information in a crossbar arrangement of two-terminal devices that can be programmed to patterns of high or low resistance. While extremely compact, this technology suffers from the "sneak-path" problem: certain information patterns cannot be recovered, as multiple low resistances in parallel make a high resistance indistinguishable from a low resistance. In this paper, a multi-layer device is considered, and the number of bits it can store is derived exactly and asymptotic bounds are developed. The information density of a series of isolated arrays with extreme aspect ratios is derived in the single- and multi-layer cases with and without peripheral selection circuitry. This density is shown to be non-zero in the limit, unlike that of the arrays with moderate aspect ratios previously considered. A simple encoding scheme that achieves capacity asymptotically is presented.
机译:电阻存储器在两个终端设备的横杆布置中存储信息,其可以被编程为高或低电阻的图案。虽然极其紧凑,但这种技术遭受了“潜行路径”问题:某些信息图案不能恢复,因为并联的多个低电阻使得能够从低电阻中无法区分。在本文中,考虑了多层设备,并且它可以存储的比特数是完全衍生的并且开发了渐近界限。具有极端纵横比的一系列隔离阵列的信息密度是在具有和不具有外围选择电路的单层和多层壳体中。与预先考虑的中等纵横比的阵列不同,该密度显示在极限中是非零。提出了一种实现渐近的容量的简单编码方案。

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