首页> 外文期刊>IEEE Transactions on Information Theory >Design of test sequences for VLSI self-testing using LFSR
【24h】

Design of test sequences for VLSI self-testing using LFSR

机译:使用LFSR进行VLSI自检的测试序列设计

获取原文
获取原文并翻译 | 示例
           

摘要

Consider a shift register (SR) of length n and a collection of designated subsets of (0,1, . . ., n-1). The problem is how to add feedback to the SR such that the resulting linear feedback shift register (LFSR) exercises (almost) exhaustively each of the designated subsets and is of small period. Several previously known results for maximum-length LFSR are extended to more general LFSR, and in particular a previously known algorithm is simplified and extended. Applications to the problems of VLSI self-testing are discussed and illustrated.
机译:考虑长度为n的移位寄存器(SR)和(0,1,...,n-1)的指定子集的集合。问题是如何向SR添加反馈,以使所得的线性反馈移位寄存器(LFSR)几乎(穷尽)地行使每个指定子集,并且周期很小。最大长度LFSR的一些先前已知的结果被扩展到更通用的LFSR,尤其是简化并扩展了先前已知的算法。讨论并举例说明了在VLSI自检问题中的应用。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号