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Improved Architecture of FDTD Dataflow Machine for Higher Performance Electromagnetic Wave Simulation

机译：用于高性能电磁波仿真的FDTD数据流机的改进架构

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摘要

As a portable high-performance computing technology for electromagnetic wave simulations, several kinds of dedicated computers for the finite-difference time-domain (FDTD) method have been considered. We previously proposed a dataflow architecture FDTD dedicated computer and showed that the estimated performance of the FDTD dataflow machine could exceed those of the high-end PC and GPU computers. On the other hand, the digital circuit of our previously proposed FDTD dataflow machine was inefficiently implemented in the field-programmable gate array (FPGA) owing to dual-mode operations of the normal grids and the perfectly matched layer (PML) grids, that is, almost half parts of the FPGA hardware resources were not used in our previously proposed machine. This paper proposes a modified architecture of the 3-D FDTD dedicated computer to improve the inefficient use of the FPGA hardware resources. The modified digital circuit of the FDTD scheme is designed to execute the FDTD calculation for eight normal grids or four PML grids. In the modified machine, there are almost no unused parts of hardware resources, and double size of FDTD scheme circuits can be implemented in the same size FPGA compared with the previously proposed machine.
机译：作为用于电磁波仿真的便携式高性能计算技术，已经考虑了几种用于时域有限差分（FDTD）方法的专用计算机。我们之前提出了一种数据流体系结构FDTD专用计算机，并表明FDTD数据流计算机的估计性能可能会超过高端PC和GPU计算机。另一方面，由于常规网格和完全匹配层（PML）网格的双模式操作，我们先前提出的FDTD数据流机的数字电路无法在现场可编程门阵列（FPGA）中有效实现。 ，几乎一半的FPGA硬件资源没有在我们先前提出的机器中使用。本文提出了一种3-D FDTD专用计算机的改进架构，以改善对FPGA硬件资源的低效使用。 FDTD方案的修改后的数字电路设计用于对八个普通网格或四个PML网格执行FDTD计算。在改进的机器中，几乎没有硬件资源的未使用部分，并且与先前提出的机器相比，可以在相同大小的FPGA中实现两倍大小的FDTD方案电路。

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