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Time-Domain Design of Digital Compensators for PWM DC-DC Converters

机译：PWM DC-DC转换器的数字补偿器的时域设计

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摘要

A time-domain design method for the digital controller of pulsewidth modulation dc–dc converters was developed. The proposed approach is based on the fact that the closed-loop response of a digitally controlled system is largely determined by the first few samples of the compensator. This concept is used to fit a digital PID template to the desired response. The proposed controller design method is carried out in the time domain and, thus, bypasses errors related to the transformation from the continuous to discrete domain and to discretization. The method was tested by simulations and experimentally. Digital PID controllers for experimental buck- and boost-type converters were designed according to the proposed method and implemented on a TMS320LF2407 DSP core. The measured closed-loop attributes were found to be in good agreement with the design goals. The study was further expanded to investigate the possible realistic closed-loop performance that can be obtained from a system that is controlled by a PID template controller, as well as the stability boundaries of the proposed time-domain controller design approach. The results of the study delineate a normalized map of deviation from the target closed-loop performance goals possible for PID control of switch-mode converters and the areas in which the use of this control law is feasible.
机译：开发了一种时域设计方法，用于脉宽调制DC-DC转换器的数字控制器。提出的方法基于以下事实：数控系统的闭环响应很大程度上由补偿器的前几个样本确定。该概念用于使数字PID模板适合所需的响应。所提出的控制器设计方法是在时域中进行的，因此绕过了与从连续域到离散域的转换以及离散化有关的误差。该方法已通过仿真和实验测试。根据提出的方法设计了用于实验降压型和升压型转换器的数字PID控制器，并将其实现在TMS320LF2407 DSP内核上。发现测得的闭环属性与设计目标非常吻合。进一步扩大了研究范围，以研究可以从由PID模板控制器控制的系统中获得的可能的逼真的闭环性能，以及所提出的时域控制器设计方法的稳定性边界。研究结果描绘了与目标闭环性能目标的偏差的归一化映射图，对于开关模式转换器的PID控制以及使用该控制律的领域，该目标闭环性能目标可能存在偏差。

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