...
  • 主题
高级搜索  >
历史搜索 清空历史
首页> 外文期刊>Integration >High-performance ternary operators for scrambling
【24h】

High-performance ternary operators for scrambling

机译：高性能三元运算符，用于加扰

获取原文
获取原文并翻译 | 示例
           
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

This paper presents two new ternary operators which can be used in different scrambling crypto algorithms. The employment of the proposed operators (ScramOp1 and ScramOp2) leads to reduction in the number of decoding steps, equivalent to only one operation per digit for the receiver side. These operators are presented for the first time in ternary logic. There are some other ternary operators such as SUM, which are specifically suitable for computer arithmetic but they lack desirable efficiency for cryptographic applications. The transistor level designs of the operators are simulated by using Synopsys HSPICE with 32 nm bulk-CMOS technology. Simulation results demonstrate that ScramOpl and ScramOp2 achieve significant saving in energy consumption (2.11% and 12.14%) in comparison with SUM. Additionally, ScramOp2 requires only 52 transistors while 58 and 60 transistors are needed to implement ScramOp1 and SUM, respectively.
机译：本文介绍了两个可以在不同的加扰加密算法中使用的新的三元运算符。提议的运算符（ScramOp1和ScramOp2）的使用导致解码步骤数量的减少，相当于接收方每位数仅执行一次操作。这些运算符是首次以三元逻辑表示。还有其他一些三元运算符，例如SUM，它们特别适合于计算机算术，但对于密码应用程序却缺乏理想的效率。运营商的晶体管级设计通过使用具有32 nm体CMOS技术的Synopsys HSPICE进行仿真。仿真结果表明，与SUM相比，ScramOpl和ScramOp2显着节省了能耗（2.11％和12.14％）。此外，ScramOp2仅需要52个晶体管，而分别需要58和60个晶体管来实现ScramOp1和SUM。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号