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HERMES: an infrastructure for low area overhead packet-switching networks on chip

机译：HERMES：片上低区域开销分组交换网络的基础架构

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The increasing complexity of integrated circuits drives the research of new on-chip interconnection architectures. A network on chip draws on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. The main goal pursued is to achieve superior bandwidth when compared to conventional on-chip bus architectures. This paper reviews the state of the art in networks on chip. Then, it describes an infrastructure called Hermes, targeted to implement packet-switching mesh and related interconnection architectures and topologies. The basic element of Hermes is a switch with five bi-directional ports, connecting to four other switches and to a local IP core. The switch employs an XY routing algorithm, and uses input queuing. The main design objective was to develop a small size switch, enabling its immediate practical use. The paper also presents the design validation of the Hermes switch and of a network on chip based on it. A Hermes NoC case study has been successfully prototyped in hardware as described in the paper, demonstrating the functionality of the approach. Quantitative data for the Hermes infrastructure is advanced.
机译：集成电路的日益复杂性推动了对新的片上互连架构的研究。片上网络利用从分布式系统和计算机网络主题领域继承的概念，以结构化和可扩展的方式互连IP内核。追求的主要目标是与传统的片上总线架构相比，实现更高的带宽。本文回顾了片上网络的最新技术。然后，它描述了一种称为Hermes的基础架构，旨在实现分组交换网状结构以及相关的互连体系结构和拓扑。 Hermes的基本元素是具有五个双向端口的交换机，该端口连接到其他四个交换机和本地IP内核。交换机采用XY路由算法，并使用输入排队。主要设计目标是开发一种小型开关，使其可以立即投入实际使用。本文还介绍了Hermes交换机以及基于该交换机的片上网络的设计验证。如本文所述，已成功在硬件中对Hermes NoC案例研究进行了原型设计，证明了该方法的功能。 Hermes基础架构的定量数据已得到改进。

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