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首页> 外文期刊>Kwartalnik Elektroniki i Telekomunikacji >On Application of Polynomial Algebra for Identification of Dynamic Faults in Interconnects
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On Application of Polynomial Algebra for Identification of Dynamic Faults in Interconnects

机译：多项式代数在互联动态故障识别中的应用

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摘要

The paper presents a new method that is an effective instrument for investigating sources of dynamic faults in interconnects (i.e. crosstalk, delay faults, etc.). It is an extension of the previous work of the authors published in the Proceedings of the European Test Symposium 2006, where fault identification was limited to static faults only. In the proposed approach an erroneous bit sequence coming from the faulty net is reconstructed on the basis of a set of signatures. This facilitates precise identification of dynamic faults. Discussed method is applicable to interconnects between ICs mounted on the PCBs as well as interconnect networks connecting IP cores in SoCs. Moreover, it is easily scalable to any number of nets in the interconnect network and can be used with any type of test sequence and test pattern generator. There are several variant s of hardware implementation of the method. This supports finding a trade-off between area overhead and testing time.
机译：本文提出了一种新方法，该方法是调查互连中动态故障源（即串扰，延迟故障等）的有效工具。它是作者先前在《 2006年欧洲测试研讨会论文集》中发表的工作的扩展，其中故障识别仅限于静态故障。在所提出的方法中，基于一组签名来重构来自故障网络的错误比特序列。这有助于精确识别动态故障。讨论的方法适用于安装在PCB上的IC之间的互连以及连接SoC中IP内核的互连网络。此外，它可以轻松扩展到互连网络中的任意数量的网络，并且可以与任何类型的测试序列和测试模式生成器一起使用。该方法的硬件实现有几种变体。这支持在区域开销和测试时间之间找到折衷方案。

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