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首页> 外文期刊>International Journal of Pattern Recognition and Artificial Intelligence >Optimized Parallel Implementation of Face Detection Based on Embedded Heterogeneous Many-Core Architecture
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Optimized Parallel Implementation of Face Detection Based on Embedded Heterogeneous Many-Core Architecture

机译：基于嵌入式异构多核架构的人脸检测并行优化实现

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摘要

Computing performance is one of the key problems in embedded systems for high-resolution face detection applications. To improve the computing performance of embedded high-resolution face detection systems, a novel parallel implementation of embedded face detection system was established based on a low power CPU-Accelerator heterogeneous many-core architecture. First, a basic CPU version of face detection prototype was implemented based on the cascade classifier and Local Binary Patterns operator. Second, the prototype was extended to a specified embedded parallel computing platform that is called Parallella and consists of Xilinx Zynq and Adapteva Epiphany. Third, the face detection algorithm was optimized to adapt to the Parallella architecture to improve the detection speed and the utilization of computing resources. Finally, a face detection experiment was conducted to evaluate the computing performance of the proposal in this paper. The experimental results show that the proposed implementation obtained a very consistent accuracy as that of the dual-core ARM, and achieved 7.8 times speedup than that of the dual-core ARM. Experiment results prove that the proposed implementation has significant advantages on computing performance.
机译：计算性能是用于高分辨率面部检测应用程序的嵌入式系统中的关键问题之一。为了提高嵌入式高分辨率人脸检测系统的计算性能，基于低功耗CPU-加速器异构多核架构，建立了嵌入式人脸检测系统的新型并行实现。首先，基于级联分类器和Local Binary Patterns运算符实现了面部检测原型的基本CPU版本。其次，将原型扩展到指定的嵌入式并行计算平台，该平台称为Parallella，由Xilinx Zynq和Adapteva Epiphany组成。第三，优化人脸检测算法以适应Parallella架构，提高了检测速度和计算资源的利用率。最后，进行了人脸检测实验以评估该建议的计算性能。实验结果表明，所提出的实现方案与双核ARM相比，具有非常一致的精度，并且比双核ARM获得了7.8倍的加速。实验结果证明，该方案在计算性能上具有明显的优势。

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