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Design and Optimization of LNA Topologies with Image Rejection Filters

机译:具有图像抑制滤波器的LNA拓扑的设计和优化

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摘要

An important problem in designing RFIC in CMOS technology is the parasitic elements of passive and active devices that complicate design calculations. This article presents three LNA topologies including cascode, folded cascade, and differential cascode and then introduces image rejection filters for low-side and high-side injection. Then, a new method for design and optimization of the circuits based on a Pareto-based multiobjective genetic algorithm is proposed. A set of optimum device values and dimensions that best match design specifications are obtained. The optimization method is layout aware, parasitic aware, and simulation based. Circuit simulations are carried out based on TSMC 0.18 μm CMOS technology by using Hspice.
机译:在CMOS技术中设计RFIC的一个重要问题是使设计计算复杂化的无源和有源器件的寄生元件。本文介绍了三种LNA拓扑结构,包括共源共栅,折叠级联和差分共源共栅,然后介绍了用于低端和高端注入的图像抑制滤波器。然后,提出了一种基于Pareto多目标遗传算法的电路设计与优化新方法。获得了一组与设计规格最匹配的最佳器件值和尺寸。该优化方法是基于布局,寄生和基于仿真的。使用Hspice基于TSMC 0.18μmCMOS技术进行了电路仿真。

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