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首页> 外文期刊>Japanese journal of applied physics >A Novel Sub-20V Contact Gate Metal Oxide Semiconductor Field Effect Transistor with Fully Complementary Metal Oxide Semiconductor Compatible Process
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A Novel Sub-20V Contact Gate Metal Oxide Semiconductor Field Effect Transistor with Fully Complementary Metal Oxide Semiconductor Compatible Process

机译：具有完全互补金属氧化物半导体兼容工艺的新型Sub-20V接触栅极金属氧化物半导体场效应晶体管

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摘要

In this paper, a novel sub-20 V device which is called contact gate MOSFET (CGMOS) with fully CMOS logic compatible process is proposed and demonstrated. Comparing with lateral double diffusion MOSFET (LDMOS), CGMOS uses P substrate instead of N minus layer as drift region in logic process, and a contact on resistance protection oxide (RPO) layers to form an extra gate on the drain side of the channel region to provide a better gate control and reduce the surface field. This new device significantly rises up the breakdown voltage to 18 V with specific on-resistance 8.8mΩ·mm~2 in a small high voltage (HV) MOSFET area. Since there is no extra mask for creating the drift region or additional step for the wire bonding, CGMOS makes the integration of high voltage and logic circuits much simpler and area-saving.
机译：本文提出并演示了一种新型的低于20 V的器件，即具有完全CMOS逻辑兼容工艺的接触式栅极MOSFET（CGMOS）。与横向双扩散MOSFET（LDMOS）相比，CGMOS在逻辑工艺中使用P衬底代替N负层作为漂移区，并在电阻保护氧化物（RPO）层上形成接触以在沟道区的漏极侧形成额外的栅极提供更好的栅极控制并减小表面场。这款新器件可在较小的高压MOSFET区域中将击穿电压显着提高至18 V，具有特定的导通电阻8.8mΩ·mm〜2。由于没有用于创建漂移区的额外掩膜或用于引线键合的额外步骤，因此CGMOS使得高压和逻辑电路的集成更加简单且节省了面积。

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  • 来源
    《Japanese journal of applied physics》 |2013年第4issue2期|04CC16.1-04CC16.6|共6页
  • 作者

    Te Liang Lee; Ming Tsang Tsai; Ya Chin King; Chrong Jung Lin;

  • 作者单位

    Microelectronics Laboratory, Institute of Electronics Engineering, National Tsing-Hua University, Hsinchu 300, Taiwan;

    Microelectronics Laboratory, Institute of Electronics Engineering, National Tsing-Hua University, Hsinchu 300, Taiwan;

    Microelectronics Laboratory, Institute of Electronics Engineering, National Tsing-Hua University, Hsinchu 300, Taiwan;

    Microelectronics Laboratory, Institute of Electronics Engineering, National Tsing-Hua University, Hsinchu 300, Taiwan;

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