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Efficient Image-Vector-Generation Processor for Edge-Based Complementary Feature Representations

机译：基于边缘的互补特征表示的高效图像矢量生成处理器

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摘要

A digital processor dedicated to edge-based image vector generation has been developed aiming at real-time image recognition. The processor consists of an on-chip memory and 16 single instruction multiple data (SIMD) processing elements. The capacity of the on-chip memory as well as the overhead for starting the processing have been minimized by introducing a seamless data transferring scheme from memory to processing elements. The 16 SIMD processing elements work together either as accumulators or as shift registers, thus achieving a very efficient generation of two different kinds of feature vector: projected principal-edge distribution (PPED)~(3,4)) and averaged principal-edge distribution (APED).~(5)) Concurrent use of these two vectors is shown to be very important for robust image recognition.~(5)) The chip was fabricated using 0.18-um complementary metal oxide semiconductor (CMOS) technology and the generation of 64-dimension PPED and APED vectors at 84.7 and 83.9 fps, respectively, from video graphics array (VGA) size images was demonstrated at 62.5 MHz.
机译：针对实时图像识别，已经开发了专用于基于边缘的图像矢量生成的数字处理器。该处理器由一个片上存储器和16个单指令多数据（SIMD）处理元件组成。通过引入从存储器到处理元件的无缝数据传输方案，片上存储器的容量以及开始处理的开销已降至最低。 16个SIMD处理元素可以作为累加器或移位寄存器一起工作，从而非常高效地生成了两种不同的特征向量：投影主边分布（PPED）〜（3,4））和平均主边分布（APED）。〜（5））同时显示这两个向量对于鲁棒的图像识别非常重要。〜（5））芯片是使用0.18um互补金属氧化物半导体（CMOS）技术制造的，从视频图形阵列（VGA）大小的图像分别以84.7和83.9 fps的分辨率对64维PPED和APED矢量进行了演示，结果显示为62.5 MHz。

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  • 来源
    《Japanese journal of applied physics》 |2012年第2issue2期|p.02BE05.1-02BE05.5|共5页
  • 作者

    Naoya Yamashita; Tadashi Shibata;

  • 作者单位

    Department of Electrical Engineering and Information Systems, The University of Tokyo, Bunkyo, Tokyo 113-8656, Japan;

    Department of Electrical Engineering and Information Systems, The University of Tokyo, Bunkyo, Tokyo 113-8656, Japan;

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