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首页> 外文期刊>Japanese journal of applied physics >Simulation of Nanoscale Two-Bit Not-And-type Silicon-Oxide-Nitride-Oxide-Silicon Nonvolatile Memory Devices with a Separated Double-Gate Fin Field Effect Transistor Structure Containing Different Tunneling Oxide Thicknesses
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Simulation of Nanoscale Two-Bit Not-And-type Silicon-Oxide-Nitride-Oxide-Silicon Nonvolatile Memory Devices with a Separated Double-Gate Fin Field Effect Transistor Structure Containing Different Tunneling Oxide Thicknesses

机译：具有分离的包含不同隧穿氧化物厚度的双栅鳍式场效应晶体管结构的纳米级两比特非常规型氧化硅-氮化物-氧化硅-硅非易失性存储器件的仿真

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摘要

Not-and (NAND)-type silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory (NVM) devices with a separated double-gate (SDG) Fin field effect transistor structure were proposed to reduce the unit cell size of such memory devices and increase their memory density in comparison with that of conventional NVM devices. The proposed memory device consisted of a pair of control gates separated along the length of the Fin channel direction. Each SDG had a different thickness of the tunneling oxide to operate the proposed memory device as a two-bit/cell device. A technology computer-aided design simulation was performed to investigate the program/erase and two-bit characteristics. The simulation results show that the proposed devices can be used to increase the scaling down capability and charge storage density of NAND-type SONOS NVM devices.
机译：提出了具有分离的双栅（SDG）Fin场效应晶体管结构的非和（NAND）型氮氧化硅（SONOS）非易失性存储器（NVM）器件，以减小这种单元的尺寸与传统的NVM设备相比，它们的存储密度有所提高。所提出的存储器件由沿着Fin通道方向的长度分开的一对控制门组成。每个SDG具有不同厚度的隧穿氧化物，以将所提出的存储器件操作为两位/单元器件。进行了技术计算机辅助设计仿真，以研究程序/擦除和两位特征。仿真结果表明，所提出的器件可用于提高NAND型SONOS NVM器件的按比例缩小功能和电荷存储密度。

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  • 来源
    《Japanese journal of applied physics》 |2009年第6issue2期|06FD12.1-06FD12.4|共4页
  • 作者

    Se Woong Oh; Sang Su Park; Dong Hun Kim; Hyun Woo Kim; Tae Whan Kim;

  • 作者单位

    Advanced Semiconductor Research Center, Division of Electronics and Computer Engineering, Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul 133-791, Korea;

    Advanced Semiconductor Research Center, Division of Electronics and Computer Engineering, Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul 133-791, Korea;

    Advanced Semiconductor Research Center, Division of Electronics and Computer Engineering, Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul 133-791, Korea;

    Nanoscale Semiconductor Engineering, Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul 133-791, Korea;

    Advanced Semiconductor Research Center, Division of Electronics and Computer Engineering, Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul 133-791, Korea Nanoscale Semiconductor Engineering, Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul 133-791, Korea;

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