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首页> 外文期刊>Journal of ambient intelligence and humanized computing >A high security and efficiency protection of confidentiality and integrity for off-chip memory
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A high security and efficiency protection of confidentiality and integrity for off-chip memory

机译：片外存储器的机密性和完整性的高安全性和高效率保护

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摘要

Due to the cost, power requirements and capacity, data are mainly stored off-chip rather than on-chip in embedded systems. The data exchanged between the processor and off-chip memory might be sensitive, security and efficiency of off-chip memory is a major concern in embedded systems. However, existing protection solutions often require significant overhead to achieve adequate protection. This paper proposes a security management method which can guarantee stronger data confidentiality and integrity with a reduced overhead in area, memory footprint, and performance cost. To reduce on-chip memory consumption and latency cost, protection scheduling and storage strategy are carefully studied, then our security management architecture is formed. Afterwards, confidentiality and integrity modules are designed respectively. Data confidentiality is protected through a Binary Additive Stream Cipher-AES-Time Stamp based on circuit and addresses scrambling network of Benes, and data integrity is safeguarded through an integrity checking module based on SHA3-TAH and MSet-XOR-Hash tree. Hardware implementation is designed and synthesized in a 0.18 mu m process. The experiment area is about 1.1mm(2) while frequency reaches 563MHz. The attack complexity is more than 2(224) while additional storage consumption is limited in about 26.6%.
机译：由于成本，功率要求和容量的原因，数据主要是在芯片外而不是在嵌入式系统中存储在芯片上。处理器与芯片外存储器之间交换的数据可能很敏感，芯片外存储器的安全性和效率是嵌入式系统中的主要问题。但是，现有的保护解决方案通常需要大量开销才能实现足够的保护。本文提出了一种安全管理方法，该方法可以保证更强的数据机密性和完整性，并减少了面积，内存占用量和性能成本。为了减少片上存储器的消耗和延迟成本，仔细研究了保护调度和存储策略，然后形成了我们的安全管理体系结构。之后，分别设计机密性和完整性模块。通过基于Benes的电路和地址加扰网络的二进制加法流密码AES时间戳来保护数据机密性，并通过基于SHA3-TAH和MSet-XOR-Hash树的完整性检查模块来保护数据完整性。硬件实现的设计和合成过程为0.18微米。实验区域约为1.1mm（2），而频率达到563MHz。攻击复杂度超过2（224），而额外的存储消耗限制在大约26.6％。

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