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Technologies for memory confidentiality, integrity, and replay protection

机译:内存机密性,完整性和重放保护技术

摘要

Technologies for memory encryption include a computing device to generate a keyed hash of a data line based on a statistical counter value and a memory address to which to write the data line and to store the keyed hash to a cache line. The statistical counter value has a reference probability of incrementing at each write operation. The cache line includes a plurality of keyed hashes and each of the keyed hashes corresponds with a different data line. The computing device further encrypts the data line based on the keyed hash, the memory address, and the statistical counter value.
机译:用于存储器加密的技术包括计算设备,该计算设备基于统计计数​​器值和向其写入数据线并将密钥散列存储到高速缓存行的存储器地址来生成数据线的密钥散列。统计计数器值在每次写操作时都有增加的参考概率。高速缓存行包括多个密钥散列,并且每个密钥散列对应于不同的数据线。计算设备还基于加密钥的哈希,存储器地址和统计计数器值来加密数据线。

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