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首页> 外文期刊>Journal of electronic imaging >Increasing feasibility of the field-programmable gate array implementation of an iterative image registration using a kernel-warping algorithm
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Increasing feasibility of the field-programmable gate array implementation of an iterative image registration using a kernel-warping algorithm

机译：使用核变形算法的迭代图像配准的现场可编程门阵列实现的可行性越来越大

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Image registration is a fundamental image processing technique. It is used to spatially align two or more images that have been captured at different times, from different sensors, or from different viewpoints. There have been many algorithms proposed for this task. The most common of these being the well-known Lucas-Kanade (LK) and Horn-Schunck approaches. However, the main limitation of these approaches is the computational complexity required to implement the large number of iterations necessary for successful alignment of the images. Previously, a multi-pass image interpolation algorithm (MP-I2A) was developed to considerably reduce the number of iterations required for successful registration compared with the LK algorithm. This paper develops a kernel-warping algorithm (KWA), a modified version of the MP-I2A, which requires fewer iterations to successfully register two images and less memory space for the field- programmable gate array (FPGA) implementation than the MP-I2A. These reductions increase feasibility of the implementation of the proposed algorithm on FPGAs with very limited memory space and other hardware resources. A two-FPGA system rather than single FPGA system is successfully developed to implement the KWA in order to compensate insufficiency of hardware resources supported by one FPGA, and increase parallel processing ability and scalability of the system. (C) 2017 SPIE and IS&T
机译：图像配准是一种基本的图像处理技术。它用于在空间上对齐在不同时间，从不同传感器或从不同视点捕获的两个或多个图像。为此任务提出了许多算法。其中最常见的是著名的卢卡斯-卡纳德（Lucas-Kanade）（LK）和霍恩-申克（Horn-Schunck）方法。但是，这些方法的主要局限性是实现成功对齐图像所需的大量迭代所需的计算复杂性。以前，与LK算法相比，开发了一种多通道图像插值算法（MP-I2A）来显着减少成功套准所需的迭代次数。本文开发了内核扭曲算法（KWA），它是MP-I2A的修改版本，与MP-I2A相比，它需要较少的迭代次数即可成功注册两个图像，并为现场可编程门阵列（FPGA）实施提供了更少的存储空间。 。这些减少增加了在存储空间和其他硬件资源非常有限的情况下在FPGA上实施所提出算法的可行性。成功开发了两个FPGA系统而不是单个FPGA系统来实现KWA，以补偿一个FPGA支持的硬件资源不足，并提高系统的并行处理能力和可扩展性。 （C）2017 SPIE和IS＆T

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