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首页> 外文期刊>Journal of Electronics, Communication and Instrumentation Engineering Research >RECONFIGURABLE SINGLE PRECISION FLOATING POINT MULTIPLIER USING REVERSIBLE LOGIC
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RECONFIGURABLE SINGLE PRECISION FLOATING POINT MULTIPLIER USING REVERSIBLE LOGIC

机译：可逆逻辑可重构的单精度浮点乘法器

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Now a days Reversible logic has received great attention due to their ability to reduce the power dissipation. It is the main requirement in low power Very large scale integration (VLSI) design. Using reversible logic circuits Quantum computers are constructed which has applications in various research areas such as DNA computing, low power CMOS design, optical computing, nanotechnology bio-informatics, quantum computing, and thermodynamic technology. It is very difficult to construct quantum circuits without the use of reversible logic gates. Since fan-out and feedback is not allowed in reversible logic circuits, Synthesis of reversible logic circuits is significantly more complicated than traditional irreversible logic circuits. There are several reversible logic gates. Some of them are: Taffoli gate, Fredkin gate, Feynmen gate, Peres gate, etc. These logical gates as well as some derivatives of these gates are explored in this project and will be used conveniently to design the single precision floating point multiplier to improve its area, speed and power parameters.
机译：如今，可逆逻辑由于其降低功耗的能力而备受关注。这是低功耗超大规模集成（VLSI）设计的主要要求。使用可逆逻辑电路，构造了量子计算机，该量子计算机可用于各种研究领域，例如DNA计算，低功耗CMOS设计，光学计算，纳米技术生物信息学，量子计算和热力学技术。不使用可逆逻辑门来构造量子电路是非常困难的。由于可逆逻辑电路不允许扇出和反馈，因此可逆逻辑电路的合成比传统不可逆逻辑电路复杂得多。有几个可逆逻辑门。其中一些是：Taffoli门，Fredkin门，Feynmen门，Peres门等。在本项目中，将对这些逻辑门以及这些门的某些派生进行探索，并将方便地用于设计单精度浮点乘法器以改进它的面积，速度和功率参数。

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