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FPGA Resources Reduction by a Multiplexing Technique Applied on ANN-Based Harmonics Extraction Algorithms

机译:通过基于ANN的谐波提取算法的复用技术减少FPGA资源

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摘要

In this paper, a multiplexing technique is applied on a neural harmonics extraction method, based on an efficient formulation of the instantaneous reactive power theory. This approach can be used in nonlinear loads compensation with APFs (Active Power Filters). The architecture for reference current generation, synchronized by a neural phase lock-loop, is composed of three Adaline neural networks. This leads to an important consumption of field programmable gate array resources during implementation. The proposed technique uses only one Adaline and keeps the immunity of the approach under non-sinusoidal and unbalanced conditions of voltage. Simulation results of the neural harmonics detection system connected to a reference current controller show balanced and sinusoidal source currents under various conditions. Results with experimental measurement made on an APF test bench demonstrate its good performances on harmonics filtering. Moreover, the simplified structure from the new approach called mp-q method shows a significant resource reduction.
机译:在本文中,基于瞬时无功功率理论的有效表述,将一种复用技术应用于神经谐波提取方法。此方法可用于带有APF(有源功率滤波器)的非线性负载补偿。由神经锁相环同步的基准电流生成架构由三个Adaline神经网络组成。这导致在实施期间大量消耗现场可编程门阵列资源。所提出的技术仅使用一种Adaline,并在非正弦和不平衡电压条件下保持该方法的抗扰性。连接到参考电流控制器的神经谐波检测系统的仿真结果显示了在各种条件下的平衡和正弦波源电流。在APF测试平台上进行的实验测量结果表明,该滤波器在谐波滤波方面具有良好的性能。此外,新方法mp-q的简化结构显示出显着的资源减少。

著录项

  • 来源
    《Journal of energy and power engineering》 |2012年第3期|469-477|共9页
  • 作者单位

    Solid Electronics and Systems Institute, University of Strasbourg, Strasbourg P.O. Box 67037, France Laboratory of Electronics, Electrotechnics, Automatic and Telecommunications, University of Douala, Douala P.O. Box 8698,Cameroon;

    Modelling, Inteligence, Process and Systems Laboratory, University of North Alsace, Mulhouse, P O. Box 68093, France;

    Laboratory of Electronics, Electrotechnics, Automatic and Telecommunications, University of Douala, Douala P.O. Box 8698, Cameroon;

    Solid Electronics and Systems Institute, University of Strasbourg, Strasbourg P.O. Box 67037, France;

    Solid Electronics and Systems Institute, University of Strasbourg, Strasbourg P.O. Box 67037, France;

    National Advanced School of Engineering, University of Yaounde I, Yaounde, P. O. Box 8390, Cameroon;

    Solid Electronics and Systems Institute, University of Strasbourg, Strasbourg P.O. Box 67037, France;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    FPGA; active power filters; instantaneous reactive power theory; power quality; resource reduction;

    机译:FPGA;有源电力滤波器;瞬时无功功率理论电能质量资源减少;

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