...
  • 主题
高级搜索  >
历史搜索 清空历史
首页> 外文期刊>Microelectronic Engineering >Design of a high performance CNTFET-based full adder cell applicable in: Carry ripple, carry select and carry skip adders
【24h】

Design of a high performance CNTFET-based full adder cell applicable in: Carry ripple, carry select and carry skip adders

机译：基于高性能CNTFET的全加法器单元的设计，适用于：携带纹波，进位选择和进位跳过加法器

获取原文
获取原文并翻译 | 示例
   

获取外文期刊封面封底 >>

       
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

Carbon Nanotube Field Effect Transistor (CNTFET)s are applied instead of silicon transistors to conquer the constraint of MOSFETs in nano-scale, with improving the power consumption and performance. Full adder is one of the basic arithmetic operations to construct large computing systems like multiplication. Due to its widespread application, its optimal design with CNTFET technology is very useful. The contribution here is to propose a high performance CNTFET-based full adder which optimizes the delay and PDP in relation to the previous works in different voltage supply and load capacitance. To show the performance and applicability of this proposed design in large computing systems, three different carry ripple, skip and select adders, all with 4, 8 and 16 size bits are designed and simulated through HSPICE and 32 nm CNTFET technology. The obtained results indicate the advantage of this proposed CNTFET-based full adder.
机译：使用碳纳米管场效应晶体管（CNTFET）代替硅晶体管，以克服纳米级MOSFET的局限性，从而改善了功耗和性能。完全加法器是构造诸如乘法之类的大型计算系统的基本算术运算之一。由于其广泛的应用，利用CNTFET技术进行优化设计非常有用。这里的贡献是提出了一种基于CNTFET的高性能全加法器，相对于先前在不同的电源电压和负载电容下的工作，该延迟器优化了延迟和PDP。为了显示该提议设计在大型计算系统中的性能和适用性，通过HSPICE和32 nm CNTFET技术设计和仿真了三种不同的进位纹波，跳跃和选择加法器，全部具有4、8和16个大小的位。获得的结果表明了这种建议的基于CNTFET的全加器的优势。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号