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RTL implementations and FPGA benchmarking of selected CAESAR Round Two authenticated ciphers

机译：选定的CAESAR第二轮身份验证密码的RTL实现和FPGA基准测试

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Authenticated ciphers are cryptographic transformations which combine the functionality of confidentiality, integrity, and authentication. This research uses register transfer-level (RTL) design to describe selected authenticated ciphers using a hardware description language (HDL), verifies their proper operation through functional simulation, and implements them on target FPGAs. The authenticated ciphers chosen for this research are the CAESAR Round Two variants of SCREAM, POET, Minalpher, and OMD. Ciphers are discussed from an engineering standpoint, and are compared and contrasted in terms of design features. To ensure conformity and standardization in evaluation, all four candidates are implemented with an identical version of the CAESAR Hardware API for authenticated ciphers. Functionally correct implementations of all four ciphers are realized, and results are compared against each other and previous results in terms of throughput, area, and throughput-to-area (TP/A) ratio. SCREAM is found to have the highest TP/A ratio of these four ciphers in the Virtex-6 FPGA, while Minalpher has the highest TP/A ratio in the Virtex-7 FPGA. (C) 2017 Elsevier B.V. All rights reserved.
机译：认证密码是结合了机密性，完整性和认证功能的密码转换。这项研究使用寄存器传输级（RTL）设计来使用硬件描述语言（HDL）描述选定的认证密码，通过功能仿真验证其正确操作，并在目标FPGA上实现它们。本研究选择的经过验证的密码是CAESAR回合的SCREAM，POET，Minalpher和OMD的两个变体。从工程的角度对密码进行了讨论，并在设计特征方面进行了比较和对比。为了确保评估的一致性和标准化，所有四个候选者都使用相同版本的CAESAR硬件API进行身份验证。实现了所有四个密码的功能正确实现，并在吞吐量，面积和吞吐量/面积（TP / A）之比方面将结果与以前的结果进行了比较。在Virtex-6 FPGA中，发现这四个密码中的SCREAM具有最高的TP / A比，而Minalpher在Virtex-7 FPGA中具有最高的TP / A比。 （C）2017 Elsevier B.V.保留所有权利。

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