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FPGA based spike-time dependent encoder and reservoir design in neuromorphic computing processors

机译：神经形态计算处理器中基于FPGA的与尖峰时间相关的编码器和存储库设计

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In this paper, we propose a Field Programmable Gate Array (FPGA) platform for spike time dependent encoder and dynamic reservoir in neuromorphic computing processors. Neuromorphic computing processors represent a type of non-traditional architecture encompassing evolutionary systems and hold great promise for many important engineering and scientific applications. The reservoir computing approach with dynamic reservoir is a paradigm in machine learning whose processing capabilities rely on the dynamical behavior of Recurrent Neural Networks (RNNs). It has made swift progress and development in both the theoretical realm and its subsequent implementations. However, most of the implementations are based on software, due to the difficulties in performing real-time training of the output weights on hardware platforms. The reservoir computing approach implemented in this paper utilizes the Echo State Network (ESN) architecture which includes a reservoir and its consequent training process. It can be trained and implemented in FPGA without any software cooperation. As FPGA is a digital logic platform and the information entered into a RNN is analog, we also propose an encoding circuit and an Analog to Digital Converter (ADC) to bridge this divide. The proposed method given for the realization of the neuromorphic computing chips, therefore, provides a viable option. (C) 2016 Elsevier B.V. All rights reserved.
机译：在本文中，我们提出了一个现场可编程门阵列（FPGA）平台，用于神经形态计算处理器中与尖峰时间相关的编码器和动态库。神经形态计算处理器代表了一种包含进化系统的非传统架构，并为许多重要的工程和科学应用带来了广阔的前景。具有动态储层的储层计算方法是机器学习的范例，其处理能力取决于递归神经网络（RNN）的动态行为。它在理论领域及其后续实现方面都取得了长足的进步。但是，由于在硬件平台上执行输出权重的实时训练很困难，因此大多数实现都是基于软件的。本文中实现的储层计算方法利用了回声状态网络（ESN）体系结构，其中包括储层及其后续训练过程。无需任何软件合作即可在FPGA中对其进行培训和实现。由于FPGA是数字逻辑平台，并且输入到RNN中的信息是模拟信息，因此我们还提出了一种编码电路和一个模数转换器（ADC）来弥合这一鸿沟。因此，所提出的用于实现神经形态计算芯片的方法提供了可行的选择。 （C）2016 Elsevier B.V.保留所有权利。

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