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首页> 外文期刊>Neural Networks and Learning Systems, IEEE Transactions on >Efficient Implementation of the Backpropagation Algorithm in FPGAs and Microcontrollers
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Efficient Implementation of the Backpropagation Algorithm in FPGAs and Microcontrollers

机译：在FPGA和微控制器中高效实现反向传播算法

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摘要

The well-known backpropagation learning algorithm is implemented in a field-programmable gate array (FPGA) board and a microcontroller, focusing in obtaining efficient implementations in terms of a resource usage and computational speed. The algorithm was implemented in both cases using a training/validation/testing scheme in order to avoid overfitting problems. For the case of the FPGA implementation, a new neuron representation that reduces drastically the resource usage was introduced by combining the input and first hidden layer units in a single module. Further, a time-division multiplexing scheme was implemented for carrying out product computations taking advantage of the built-in digital signal processor cores. In both implementations, the floating-point data type representation normally used in a personal computer (PC) has been changed to a more efficient one based on a fixed-point scheme, reducing system memory variable usage and leading to an increase in computation speed. The results show that the modifications proposed produced a clear increase in computation speed in comparison with the standard PC-based implementation, demonstrating the usefulness of the intrinsic parallelism of FPGAs in neurocomputational tasks and the suitability of both implementations of the algorithm for its application to the real world problems.
机译：众所周知的反向传播学习算法是在现场可编程门阵列（FPGA）板和微控制器中实现的，重点是在资源使用和计算速度方面获得有效的实现。在两种情况下都使用训练/验证/测试方案来实现该算法，以避免过拟合的问题。对于FPGA实现，通过在单个模块中组合输入和第一隐藏层单元，引入了一种新的神经元表示形式，该表示形式大大减少了资源使用。此外，实现了时分多路复用方案，以利用内置的数字信号处理器内核进行乘积计算。在这两种实现中，基于定点方案，通常在个人计算机（PC）中使用的浮点数据类型表示形式已更改为更有效的表示形式，从而减少了系统内存变量的使用并导致计算速度的提高。结果表明，与基于PC的标准实现相比，所提出的修改明显提高了计算速度，证明了FPGA固有并行性在神经计算任务中的有用性，以及该算法的两种实现方式均适用于神经计算任务。现实世界中的问题。

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