Processor Array Architectures for Scalable Radix 4 Montgomery Modular Multiplication Algorithm

Ibrahim Atef; Gebali Fayez; Elsimary Hamed; Nassar Amin

首页> 外文期刊>Parallel and Distributed Systems, IEEE Transactions on >Processor Array Architectures for Scalable Radix 4 Montgomery Modular Multiplication Algorithm

【24h】

Processor Array Architectures for Scalable Radix 4 Montgomery Modular Multiplication Algorithm

机译：可扩展的Radix 4 Montgomery模块化乘法算法的处理器阵列架构

获取原文

获取原文并翻译 | 示例

掌桥外文数据库（机构版） >>

开具论文收录证明 >>

文献代查 >>

页面导航

摘要
著录项
相似文献
相关主题

摘要

This paper presents a systematic methodology for exploring possible processor arrays of scalable radix 4 modular Montgomery multiplication algorithm. In this methodology, the algorithm is first expressed as a regular iterative expression, then the algorithm data dependence graph and a suitable affine scheduling function are obtained. Four possible processor arrays are obtained and analyzed in terms of speed, area, and power consumption. To reduce power consumption, we applied low power techniques for reducing the glitches and the Expected Switching Activity (ESA) of high fan-out signals in our processor array architectures. The resulting processor arrays are compared to other efficient ones in terms of area, speed, and power consumption.

机译：本文提出了一种探索可扩展基数4模块化蒙哥马利乘法算法的可能处理器阵列的系统方法。在这种方法中，首先将算法表示为正则迭代表达式，然后获得算法数据依赖图和合适的仿射调度函数。获得了四个可能的处理器阵列，并根据速度，面积和功耗进行了分析。为了降低功耗，我们采用了低功耗技术来减少处理器阵列架构中的毛刺和高扇出信号的预期开关活动（ESA）。在面积，速度和功耗方面，将所得的处理器阵列与其他高效的处理器阵列进行比较。

著录项

来源
《Parallel and Distributed Systems, IEEE Transactions on》 |2011年第7期|p.1142-1149|共8页
作者
Ibrahim Atef; Gebali Fayez; Elsimary Hamed; Nassar Amin;
展开▼
作者单位

Electronics Research Institute, Cairo;

展开▼
收录信息
原文格式 PDF
正文语种 eng
中图分类
关键词
Montgomery multiplication; Processor array; cryptography; low power modular multipliers.; scalability; secure communications;

机译：蒙哥马利乘法;处理器阵列;密码学;低功耗模块化乘法器;可扩展性;安全通信;

相似文献

外文文献
中文文献
专利

1. High-performance, low-power architecture for scalable radix 2 montgomery modular multiplication algorithm [J] . Atef Ibrahim, Fayez Gebali, Hamed El-Simary, Canadian journal of electrical and computer engineering . 2009,第4期

机译：高性能，低功耗架构，可扩展基数2 Montgomery模块化乘法算法
2. High-performance, low-power architecture for scalable radix 2 montgomery modular multiplication algorithm [J] . Electrical and Computer Engineering, Canadian Journal of . 2009,第4期

机译：高性能，低功耗架构，可扩展基数2 Montgomery模块化乘法算法
3. An Efficient Radix-4 Scalable Architecture for Montgomery Modular Multiplication [J] . Shiann-Rong Kuang, Chih-Yuan Liang, Chun-Chi Chen Circuits and Systems II: Express Briefs, IEEE Transactions on . 2016,第6期

机译：蒙哥马利模块化乘法的高效Radix-4可扩展架构
4. New processor array architecture for scalable radix 8 montgomery modular multiplication algorithm [C] . Ibrahim Atef, Gebali Fayez, Elsimary Hamed, 2011 24th Canadian Conference on Electrical and Computer Engineering . 2011

机译：用于可扩展基数8 Montgomery模块化乘法算法的新处理器阵列架构
5. A high-speed modular multiplier architecture based on modified Montgomery's multiplication algorithm. [D] . Magadi, Anand Shivashankaraiah. 2002

机译：一种基于改进的蒙哥马利乘法算法的高速模块化乘法器体系结构。
6. A Parallel Architecture for the Partitioning around Medoids (PAM) Algorithm for Scalable Multi-Core Processor Implementation with Applications in Healthcare [O] . Hassan Mushtaq, Sajid Gul Khawaja, Muhammad Usman Akram, 2018

机译：围绕Medoids（PAM）算法进行分区的并行体系结构可实现可扩展的多核处理器及其在医疗保健中的应用
7. FPGA Versus ASIC Implementation of Radix-8 Scalable Montgomery Modular Multiplier.(Dept.E) FPGA Versus ASIC Implementation of Radix-8 Scalable Montgomery Modular Multiplier (Dept.E) [O] . Ateef Ebrahim, Hamed ElSemary, Amen Nassar 2020

机译：FPGA与基数-8可扩展蒙哥马利模块化倍增器的ASIC实现。（DEPT.E）FPGA与ASIC实现的基数-8可扩展蒙格组合模块化倍增仪（DEPT.E）
8. HIFI: A Design Method for Implementing Signal Processing Algorithms on VLSI (Very Large Scale Integration) Processor Arrays [R] . Annevelink, J. 1988

机译：HIFI：一种在超大规模集成（VLsI）处理器阵列上实现信号处理算法的设计方法

Processor Array Architectures for Scalable Radix 4 Montgomery Modular Multiplication Algorithm

摘要

著录项

相似文献

相关主题

期刊订阅