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首页> 外文期刊>IEEE Transactions on Parallel and Distributed Systems >Routing in modular fault-tolerant multiprocessor systems
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Routing in modular fault-tolerant multiprocessor systems

机译：模块化容错多处理器系统中的路由

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摘要

In this paper, we consider a class of modular multiprocessor architectures in which spares are added to each module to cover for faulty nodes within that module, thus forming a fault-tolerant basic block (FTBB). In contrast to reconfiguration techniques that preserve the physical adjacency between active nodes in the system, our goal is to preserve the logical adjacency between active nodes by means of a routing algorithm which delivers messages successfully to their destinations. We introduce two-phase routing strategies that route messages first to their destination FTBB, and then to the destination nodes within the destination FTBB. Such a strategy may be applied to a variety of architectures including binary hypercubes and three-dimensional tori. In the presence of f faults in hypercubes and tori, we show that the worst case length of the message route is min {/spl sigma/+f, (K+1)/spl sigma/}+c where /spl sigma/ is the shortest path in the absence of faults, K is the number of spare nodes in an FTBB, and c is a small constant. The average routing overhead is much lower than the worst case overhead.
机译：在本文中，我们考虑了一类模块化的多处理器体系结构，其中在每个模块中添加了备用组件以覆盖该模块中的故障节点，从而形成了一个容错的基本块（FTBB）。与保留系统中活动节点之间的物理邻接关系的重新配置技术相反，我们的目标是通过路由算法来保留活动节点之间的逻辑邻接关系，该路由算法可将消息成功传递到目的地。我们引入了两阶段路由策略，该策略首先将消息路由到它们的目标FTBB，然后再路由到目标FTBB内的目标节点。这样的策略可以应用于包括二进制超立方体和三维花托的多种体系结构。在超立方体和花托中存在f个断层的情况下，我们表明消息路由的最坏情况长度为min {/ spl sigma / + f，（K + 1）/ spl sigma /} + c，其中/ spl sigma /为没有故障的最短路径，K是FTBB中备用节点的数量，c是一个小的常数。平均路由开销远低于最坏情况的开销。

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