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首页> 外文期刊>IEEE Transactions on Parallel and Distributed Systems >Optimizing Depthwise Separable Convolution Operations on GPUs
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Optimizing Depthwise Separable Convolution Operations on GPUs

机译：在GPU上优化深度可分离的卷积操作

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摘要

The depthwise separable convolution is commonly seen in convolutional neural networks (CNNs), and is widely used to reduce the computation overhead of a standard multi-channel 2D convolution. Existing implementations of depthwise separable convolutions target accelerating model training with large batch sizes with a large number of samples to be processed at once. Such approaches are inadequate for small-batch-sized model training and the typical scenario of model inference where the model takes in a few samples at once. This article aims to bridge the gap of optimizing depthwise separable convolutions by targeting the GPU architecture. We achieve this by designing two novel algorithms to improve the column and row reuse of the convolution operation to reduce the number of memory operations performed on the width and the height dimensions of the 2D convolution. Our approach employs a dynamic tile size scheme to adaptively distribute the computational data across GPU threads to improve GPU utilization and to hide the memory access latency. We apply our approach on two GPU platforms: an NVIDIA RTX 2080Ti GPU and an embedded NVIDIA Jetson AGX Xavier GPU, and two data types: 32-bit floating point (FP32) and 8-bit integer (INT8). We compared our approach against cuDNN that is heavily tuned for the NVIDIA GPU architecture. Experimental results show that our approach delivers over 2x (up to 3x) performance improvement over cuDNN. We show that, when using a moderate batch size, our approach averagely reduces the end-to-end training time of MobileNet and EfficientNet by 9.7 and 7.3 percent respectively, and reduces the end-to-end inference time of MobileNet and EfficientNet by 12.2 and 11.6 percent respectively.
机译：在卷积神经网络（CNNS）中通常可以看到深度可分离的卷积，并且广泛用于降低标准多通道2D卷积的计算开销。对深度可分离卷积的现有实现目标加速模型训练，其大量批量尺寸具有大量样品待处理。这种方法对于小批量大小的模型训练和模型推断的典型情景不足，其中模型一次采用少量样品。本文旨在通过针对GPU架构弥合优化深度可分离卷积的差距。我们通过设计两种新颖算法来实现这一目标，以改善卷积操作的柱和行重复使用，以减少对宽度和2D卷积的高度尺寸执行的存储器操作的数量。我们的方法采用动态区块大小方案来自适应地将GPU线程分配计算数据，以提高GPU利用率并隐藏内存访问延迟。我们在两个GPU平台上应用了我们的方法：NVIDIA RTX 2080TI GPU和嵌入式NVIDIA Jetson AGX Xavier GPU，以及两个数据类型：32位浮点（FP32）和8位整数（INT8）。我们将我们对CUDNN的方法进行了比较，这对NVIDIA GPU架构进行了严重调整的。实验结果表明，我们的方法在CUDNN上提供了2倍（高达3倍）的性能改进。我们表明，在使用中等批次大小时，我们的方法平均降低了MobileNet和效率的端到端培训时间分别为9.7％和7.3％，并减少了MobileNet和WequenceNet的端到端推断时间12.2分别为11.6％。

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