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首页> 外文期刊>Research journal of applied science, engineering and technology >Design and Implementation of Enhanced Affine and Inverse Affine Transformation Based Composite S-box for AES Encryption and Decryption
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Design and Implementation of Enhanced Affine and Inverse Affine Transformation Based Composite S-box for AES Encryption and Decryption

机译：基于增强仿射和仿射逆变换的复合S盒用于AES加密和解密的设计与实现

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摘要

The Substitution Box (S-Box) and Inverse MixColumn (Inv MixColumn) forms core building blocks in Advanced Encryption Standard (AES) based Security Algorithm. This study presents full custom design of Composite S-Box by reducing the composite field arithmetic of Multiplication Inverse (MI) and Affine/Inverse Affine Transformation. Design of proposed new MI and Affine/Inverse Affine Transformation techniques are integrated in Composite S-Box of both AES Encryption and Decryption. Very Large Scale Integration (VLSI) System design environment is considered in this research work to measure the performance improvement. High Speed, less area utilization and Lower power consumptions are the important parameter in VLSI System design environment. Hence, the main goal of this research work is to reduce the hardware complexity, Power and Delay consumption of AES Encryption and Decryption process. The principle of reducing the redundant functions is used in both MI and Affine/Inverse Affine Transformation of Proposed Composite S-Box design for reducing the hardware complexity and power consumption. Proposed new Composite S-Box design offers 6.52% reduction of Slices, 5.68% reduction of Look up Tables (LUTs), 2.24% reduction of delay and 6.15% reduction of Power consumption than traditional Composite S-Box design. Further Proposed new composite S-Box design is integrated into both AES encryption and AES decryption process to improve the performance evaluation of AES algorithm.
机译：替换框（S-Box）和逆混合列（Inv MixColumn）构成了基于高级加密标准（AES）的安全算法中的核心构建块。本研究通过减少乘法逆（MI）和仿射/仿射逆变换的复合场算法，提出了复合S-Box的完全定制设计。拟议的新MI和仿射/仿射逆变换技术的设计集成在AES加密和解密的复合S-Box中。这项研究工作考虑了超大规模集成（VLSI）系统设计环境，以衡量性能提高。高速，更少的面积利用率和更低的功耗是VLSI系统设计环境中的重要参数。因此，这项研究工作的主要目标是降低AES加密和解密过程的硬件复杂性，功耗和延迟消耗。减少冗余功能的原理在MI和提议的复合S-Box设计的仿射/仿射逆变换中均使用，以降低硬件复杂性和功耗。与传统的Composite S-Box设计相比，拟议的新型Composite S-Box设计可减少6.52％的切片，减少5.68％的查找表（LUT），减少2.24％的延迟，并降低6.15％的功耗。进一步建议将新的复合S-Box设计集成到AES加密和AES解密过程中，以改善AES算法的性能评估。

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