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首页> 外文期刊>Sensors Journal, IEEE >Low Power, High Dynamic Range CMOS Image Sensor Employing Pixel-Level Oversampling Analog-to-Digital Conversion
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Low Power, High Dynamic Range CMOS Image Sensor Employing Pixel-Level Oversampling Analog-to-Digital Conversion

机译：低功耗，高动态范围CMOS图像传感器，采用像素级过采样模数转换

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摘要

We present a theoretical analysis, design, and experimental characterization of a CMOS image sensor with pixel-level $SigmaDelta$ oversampling analog-to-digital conversion (ADC). The design employs five transistors per-pixel to implement a charge-based $SigmaDelta$ ADC at each pixel. In the current design a dynamic regenerative latch comparator is divided into an input transistor, which is contained within each pixel, and the remaining comparator structure shared among the pixels of each column. A charge feedback digital-to-analog converter (DAC) is implemented at each pixel with a three-transistor structure. As opposed to more traditional CMOS image sensors, this image sensor architecture is suitable for implementations in advanced low supply voltage CMOS technologies since its dynamic range is not affected by the reduction of the pixel reset voltage. In addition, similar to the readout methods in low power random access memory designs, this pixel readout architecture does not employ any active amplifiers which allows for low static power operation. Experimental characterization of a prototype fabricated in a 0.35 $mu{hbox {m}}$ silicided CMOS technology is presented. The estimated power consumption of the fully integrated 128 $times$ 128 imager including decimation filters and I/O interface is 60 nW/pixel at 30 frames per second for 8-bits per-pixel. A peak signal-to-noise ratio of 52 dB and intra-scene dynamic range of 74 dB were measured. The dynamic range was extended to 91 dB through control of the in-pixel DAC supply voltage over the range of 0.8 V–3.3 V.
机译：我们介绍了具有像素级$ SigmaDelta $过采样模数转换（ADC）的CMOS图像传感器的理论分析，设计和实验特性。该设计每个像素采用五个晶体管，以在每个像素上实现基于电荷的Σ-ΔADC。在当前设计中，动态再生锁存比较器被分为输入晶体管，该输入晶体管包含在每个像素内，其余的比较器结构在每一列的像素之间共享。电荷反馈数模转换器（DAC）在每个像素处采用三晶体管结构实现。与更传统的CMOS图像传感器相反，此图像传感器体系结构适用于先进的低电源电压CMOS技术，因为其动态范围不受像素复位电压降低的影响。另外，类似于低功率随机存取存储器设计中的读出方法，该像素读出架构不采用允许低静态功率操作的任何有源放大器。提出了在0.35美元的硅化CMOS技术中制造的原型的实验表征。完全集成的128 x 128成像器（包括抽取滤波器和I / O接口）的估计功耗为60 nW /像素，每秒30帧，每像素8位。测量的峰值信噪比为52 dB，场景内动态范围为74 dB。通过控制0.8 V–3.3 V范围内的像素内DAC电源电压，动态范围扩展至91 dB。

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