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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 0.8-V 82.9- $mu$ W In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver
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A 0.8-V 82.9- $mu$ W In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver

机译:具有8.8 PEF的0.8V V 82.9- $ mu $ W入耳式BCI控制器IC EEG仪表放大器和无线BAN收发器

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摘要

In-ear brain-computer interface (BCI) controller system is implemented with a dedicated system-on-chip (SoC) including electroencephalography (EEG) readout and body channel communication (BCC) transceiver (TRX). The 8-mm(2) chip is fabricated using 65-nm CMOS and contains three key features: 1) current reusing low-noise amplifier (CRLNA) for low power; 2) bootstrapping dc servo loop (BDSL) enabling low-noise measurement even on 350-mV electrode dc offset (EDO); and 3) dual-mode programmable gain amplifier (DMPGA) that reduces TRX power consumption by activating only when the intentional blink is present. EEG instrumentation amplifier (IA) shows the state-of-the-art 8.8 power efficiency factor (PEF) performance, and the entire integrated circuit (IC) consumes 82.9 mu W. From the measurement, with nine subjects, the proposed BCI system accomplished 84% average accuracy for the binary selection task.
机译:入耳式脑机接口(BCI)控制器系统是通过专用的片上系统(SoC)实现的,该片上系统包括脑电图(EEG)读数和体通道通信(BCC)收发器(TRX)。这种8毫米(2)芯片是使用65纳米CMOS制造的,具有三个关键特征:1)电流重用低噪声放大器(CRLNA),以实现低功耗; 2)自举直流伺服环路(BDSL),即使在350 mV电极直流偏移(EDO)上也能实现低噪声测量; 3)双模式可编程增益放大器(DMPGA),它仅在有意眨眼时才激活,从而降低了TRX功耗。 EEG仪表放大器(IA)展现了最新的8.8功率效率因子(PEF)性能,整个集成电路(IC)消耗了82.9μW的功率。通过测量,有9个对象,拟议的BCI系统得以完成二进制选择任务的平均准确度为84%。

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